
;; Function compute_jump_reg_dependencies (_ZL29compute_jump_reg_dependenciesP7rtx_defP11bitmap_head, funcdef_no=2456, decl_uid=99321, cgraph_uid=1504, symbol_order=1551)



compute_jump_reg_dependencies

Dataflow summary:
;;  fully invalidated by EH 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr]
;;  hardware regs used 	 1 [1] 2 [2] 99 [ap] 109 [vscr] 110 [sfp]
;;  regular block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  eh block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  entry block defs 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 31 [31] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 96 [lr] 99 [ap] 109 [vscr] 110 [sfp]
;;  exit block uses 	 1 [1] 2 [2] 31 [31] 108 [vrsave] 109 [vscr] 110 [sfp]
;;  regs ever live 	
;;  ref usage 	r1={1d,2u} r2={1d,2u} r3={1d} r4={1d} r5={1d} r6={1d} r7={1d} r8={1d} r9={1d} r10={1d} r31={1d,2u} r33={1d} r34={1d} r35={1d} r36={1d} r37={1d} r38={1d} r39={1d} r40={1d} r41={1d} r42={1d} r43={1d} r44={1d} r45={1d} r66={1d} r67={1d} r68={1d} r69={1d} r70={1d} r71={1d} r72={1d} r73={1d} r74={1d} r75={1d} r76={1d} r77={1d} r96={1d} r99={1d,1u} r108={1u} r109={1d,1u} r110={1d,2u} 
;;    total ref usage 51{40d,11u,0e} in 0{0 regular + 0 call} insns.
;; basic block 2, loop depth 0, count 1073741824 (estimated locally), maybe hot
;;  prev block 0, next block 1, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       ENTRY [always]  count:1073741824 (estimated locally) (FALLTHRU)
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]
;; live  gen 	
;; live  kill	
(note 5 0 4 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(note 4 5 0 2 NOTE_INSN_FUNCTION_BEG)
;;  succ:       EXIT [always]  count:1073741824 (estimated locally) (FALLTHRU) /builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc:260:1
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]


;; Function update_node_sched_params (_ZL24update_node_sched_paramsiiii, funcdef_no=2466, decl_uid=99701, cgraph_uid=1514, symbol_order=1565)



update_node_sched_params

Dataflow summary:
;;  fully invalidated by EH 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr]
;;  hardware regs used 	 1 [1] 2 [2] 99 [ap] 109 [vscr] 110 [sfp]
;;  regular block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  eh block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  entry block defs 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 31 [31] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 96 [lr] 99 [ap] 109 [vscr] 110 [sfp]
;;  exit block uses 	 1 [1] 2 [2] 31 [31] 108 [vrsave] 109 [vscr] 110 [sfp]
;;  regs ever live 	 2 [2] 3 [3] 4 [4] 5 [5] 6 [6]
;;  ref usage 	r1={1d,7u} r2={1d,8u} r3={1d,1u} r4={1d,1u} r5={1d,1u} r6={1d,1u} r7={1d} r8={1d} r9={1d} r10={1d} r31={1d,7u} r33={1d} r34={1d} r35={1d} r36={1d} r37={1d} r38={1d} r39={1d} r40={1d} r41={1d} r42={1d} r43={1d} r44={1d} r45={1d} r66={1d} r67={1d} r68={1d} r69={1d} r70={1d} r71={1d} r72={1d} r73={1d} r74={1d} r75={1d} r76={1d} r77={1d} r96={1d} r99={1d,6u} r108={1u} r109={1d,1u} r110={1d,7u} r118={1d,3u} r119={1d,1u} r120={1d,1u} r121={1d,1u} r122={1d,1u} r123={1d,1u} r124={1d,1u} r125={2d,1u} r126={1d,1u} r127={1d,1u} r128={1d,3u} r129={1d,1u} r130={1d,2u} r131={1d,3u} r132={1d,1u,1e} r133={1d,2u} r134={1d,2u} r135={1d,1u} r136={1d,2u} r137={1d,3u} r138={1d,11u,2e} r139={1d,6u,1e} r140={1d,1u} r149={1d,1u} r151={1d,1u} r153={1d,1u} r154={1d,1u} 
;;    total ref usage 167{68d,95u,4e} in 64{64 regular + 0 call} insns.
;; basic block 2, loop depth 0, count 1073741824 (estimated locally), maybe hot
;;  prev block 0, next block 3, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       ENTRY [always]  count:1073741824 (estimated locally) (FALLTHRU)
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; lr  use 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	 118 126 128 129 131 132 133 135 136 137 138 139 140 149 151 153
;; live  in  	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]
;; live  gen 	 118 126 128 129 131 132 133 135 136 137 138 139 140 149 151 153
;; live  kill	
(note 7 0 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 2 7 3 2 (set (reg/v:DI 137 [ u ])
        (reg:DI 3 3 [ u ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":470:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 3 3 [ u ])
        (nil)))
(insn 3 2 4 2 (set (reg/v:DI 138 [ ii ])
        (reg:DI 4 4 [ ii ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":470:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 4 4 [ ii ])
        (nil)))
(insn 4 3 5 2 (set (reg/v:DI 139 [ cycle ])
        (reg:DI 5 5 [ cycle ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":470:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 5 5 [ cycle ])
        (nil)))
(insn 5 4 6 2 (set (reg/v:DI 140 [ min_cycle ])
        (reg:DI 6 6 [ min_cycle ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":470:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 6 6 [ min_cycle ])
        (nil)))
(note 6 5 9 2 NOTE_INSN_FUNCTION_BEG)
(debug_insn 9 6 10 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":471:3 -1
     (nil))
(debug_insn 10 9 11 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":472:3 -1
     (nil))
(debug_insn 11 10 13 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:3 -1
     (nil))
(debug_insn 13 11 14 2 (var_location:DI this (symbol_ref:DI ("_ZL20node_sched_param_vec") [flags 0x82]  <var_decl 0x3fff7ef48ea0 node_sched_param_vec>)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:3 -1
     (nil))
(debug_insn 14 13 15 2 (var_location:SI ix (subreg/u:SI (reg/v:DI 137 [ u ]) 0)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:3 -1
     (nil))
(debug_insn 15 14 17 2 (debug_marker:BLK) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1504:6 -1
     (nil))
(insn 17 15 18 2 (set (reg/f:DI 131 [ _27 ])
        (mem/f/c:DI (unspec:DI [
                    (symbol_ref:DI ("*.LANCHOR0") [flags 0x182])
                    (reg:DI 2 2)
                ] UNSPEC_TOCREL) [91 node_sched_param_vec.m_vec+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1505:14 687 {*movdi_internal64}
     (nil))
(debug_insn 18 17 19 2 (var_location:DI this (reg/f:DI 131 [ _27 ])) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1505:14 -1
     (nil))
(debug_insn 19 18 20 2 (var_location:SI ix (subreg/u:SI (reg/v:DI 137 [ u ]) 0)) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1505:14 -1
     (nil))
(debug_insn 20 19 21 2 (debug_marker:BLK) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":888:1 -1
     (nil))
(insn 21 20 22 2 (set (reg:DI 129 [ _25 ])
        (zero_extend:DI (subreg/u:SI (reg/v:DI 137 [ u ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":891:21 discrim 1 19 {zero_extendsidi2}
     (nil))
(insn 22 21 23 2 (set (reg:DI 135 [ _31 ])
        (ashift:DI (reg:DI 129 [ _25 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":891:20 discrim 1 283 {ashldi3}
     (expr_list:REG_DEAD (reg:DI 129 [ _25 ])
        (nil)))
(insn 23 22 24 2 (set (reg:DI 133 [ _29 ])
        (plus:DI (reg:DI 135 [ _31 ])
            (const_int 8 [0x8]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 135 [ _31 ])
        (nil)))
(insn 24 23 25 2 (set (reg/f:DI 128 [ _24 ])
        (plus:DI (reg/f:DI 131 [ _27 ])
            (reg:DI 133 [ _29 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":891:23 discrim 1 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 133 [ _29 ])
        (expr_list:REG_DEAD (reg/f:DI 131 [ _27 ])
            (nil))))
(debug_insn 25 24 26 2 (var_location:DI this (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1505:20 -1
     (nil))
(debug_insn 26 25 27 2 (var_location:SI ix (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/vec.h":1505:20 -1
     (nil))
(debug_insn 27 26 28 2 (var_location:DI this (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:3 -1
     (nil))
(debug_insn 28 27 29 2 (var_location:SI ix (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:3 -1
     (nil))
(insn 29 28 30 2 (set (mem:SI (plus:DI (reg/f:DI 131 [ _27 ])
                (reg:DI 133 [ _29 ])) [6 _24->time+0 S4 A32])
        (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":474:18 discrim 1 560 {*movsi_internal1}
     (nil))
(debug_insn 30 29 35 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:3 -1
     (nil))
(insn 35 30 36 2 (set (reg:SI 149)
        (div:SI (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 184 {*divsi3}
     (expr_list:REG_EQUAL (div:SI (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))
        (nil)))
(insn 36 35 37 2 (set (reg:SI 151)
        (mult:SI (reg:SI 149)
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 159 {mulsi3}
     (expr_list:REG_DEAD (reg:SI 149)
        (nil)))
(insn 37 36 38 2 (set (reg:SI 118 [ _2 ])
        (minus:SI (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)
            (reg:SI 151))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 99 {*subfsi3}
     (nil))
(insn 38 37 39 2 (set (reg:SI 126 [ _13 ])
        (minus:SI (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0)
            (subreg/s/u:SI (reg/v:DI 140 [ min_cycle ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 99 {*subfsi3}
     (expr_list:REG_DEAD (reg/v:DI 140 [ min_cycle ])
        (nil)))
(insn 39 38 41 2 (set (reg:SI 132 [ _28 ])
        (plus:SI (reg:SI 126 [ _13 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 126 [ _13 ])
        (nil)))
(insn 41 39 44 2 (set (reg:SI 136 [ _32 ])
        (div:SI (reg:SI 132 [ _28 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:23 184 {*divsi3}
     (expr_list:REG_EQUAL (div:SI (reg:SI 132 [ _28 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))
        (nil)))
(insn 44 41 45 2 (set (reg:CC 153)
        (compare:CC (reg:SI 118 [ _2 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 844 {*cmpsi_signed}
     (nil))
(jump_insn 45 44 46 2 (set (pc)
        (if_then_else (ge (reg:CC 153)
                (const_int 0 [0]))
            (label_ref 56)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 153)
        (int_list:REG_BR_PROB 633507684 (nil)))
 -> 56)
;;  succ:       3 [41.0% (guessed)]  count:440234144 (estimated locally) (FALLTHRU)
;;              4 [59.0% (guessed)]  count:633507680 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 118 128 136 138 139
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 128 136 138 139

;; basic block 3, loop depth 0, count 440234144 (estimated locally), maybe hot
;;  prev block 2, next block 4, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       2 [41.0% (guessed)]  count:440234144 (estimated locally) (FALLTHRU)
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 118 128 136 138 139
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 118 128 138
;; lr  def 	 127
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 128 136 138 139
;; live  gen 	 127
;; live  kill	
(note 46 45 47 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 47 46 48 3 (set (reg:SI 127 [ iftmp.521_20 ])
        (plus:SI (reg:SI 118 [ _2 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:19 discrim 1 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 118 [ _2 ])
        (nil)))
(insn 48 47 49 3 (set (mem:SI (plus:DI (reg/f:DI 128 [ _24 ])
                (const_int 4 [0x4])) [6 _24->row+0 S4 A32])
        (reg:SI 127 [ iftmp.521_20 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:17 discrim 1 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 127 [ iftmp.521_20 ])
        (nil)))
(debug_insn 49 48 50 3 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:3 -1
     (nil))
(debug_insn 50 49 51 3 (var_location:SI D#58 (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 -1
     (nil))
(debug_insn 51 50 52 3 (var_location:SI D#57 (plus:SI (debug_expr:SI D#58)
        (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 -1
     (nil))
(debug_insn 52 51 53 3 (var_location:SI sc_until_cycle_zero (div:SI (debug_expr:SI D#57)
        (subreg:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:23 -1
     (nil))
(debug_insn 53 52 56 3 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":481:3 -1
     (nil))
;;  succ:       5 [always]  count:440234144 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 128 136 138 139
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 128 136 138 139

;; basic block 4, loop depth 0, count 633507680 (estimated locally), maybe hot
;;  prev block 3, next block 5, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       2 [59.0% (guessed)]  count:633507680 (estimated locally)
;; bb 4 artificial_defs: { }
;; bb 4 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 118 128 136 138 139
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 118 128 139
;; lr  def 	 154
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 128 136 138 139
;; live  gen 	 154
;; live  kill	
(code_label 56 53 57 4 4 (nil) [1 uses])
(note 57 56 58 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
(insn 58 57 59 4 (set (mem:SI (plus:DI (reg/f:DI 128 [ _24 ])
                (const_int 4 [0x4])) [6 _24->row+0 S4 A32])
        (reg:SI 118 [ _2 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":475:17 discrim 1 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 118 [ _2 ])
        (nil)))
(debug_insn 59 58 60 4 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:3 -1
     (nil))
(debug_insn 60 59 61 4 (var_location:SI D#60 (clobber (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 -1
     (nil))
(debug_insn 61 60 62 4 (var_location:SI D#59 (plus:SI (debug_expr:SI D#60)
        (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:25 -1
     (nil))
(debug_insn 62 61 63 4 (var_location:SI sc_until_cycle_zero (div:SI (debug_expr:SI D#59)
        (subreg:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":479:23 -1
     (nil))
(debug_insn 63 62 66 4 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":481:3 -1
     (nil))
(insn 66 63 67 4 (set (reg:CC 154)
        (compare:CC (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":481:3 discrim 1 844 {*cmpsi_signed}
     (nil))
(jump_insn 67 66 68 4 (set (pc)
        (if_then_else (ge (reg:CC 154)
                (const_int 0 [0]))
            (label_ref 80)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":481:3 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 154)
        (int_list:REG_BR_PROB 914812532 (nil)))
 -> 80)
;;  succ:       5 [14.8% (guessed)]  count:93768285 (estimated locally) (FALLTHRU)
;;              6 [85.2% (guessed)]  count:539739395 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 128 136 138 139
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 128 136 138 139

;; basic block 5, loop depth 0, count 440234144 (estimated locally), maybe hot
;; Invalid sum of incoming counts 534002429 (estimated locally), should be 440234144 (estimated locally)
;;  prev block 4, next block 6, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       4 [14.8% (guessed)]  count:93768285 (estimated locally) (FALLTHRU)
;;              3 [always]  count:440234144 (estimated locally) (FALLTHRU)
;; bb 5 artificial_defs: { }
;; bb 5 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 128 136 138 139
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 136 138 139
;; lr  def 	 119 120 125 134
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 128 136 138 139
;; live  gen 	 119 120 125 134
;; live  kill	
(code_label 68 67 69 5 5 (nil) [0 uses])
(note 69 68 70 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
(debug_insn 70 69 71 5 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":483:7 -1
     (nil))
(insn 71 70 72 5 (set (reg:SI 119 [ _5 ])
        (minus:SI (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0)
            (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":483:15 discrim 1 99 {*subfsi3}
     (expr_list:REG_DEAD (reg/v:DI 139 [ cycle ])
        (nil)))
(insn 72 71 74 5 (set (reg:SI 120 [ _6 ])
        (plus:SI (reg:SI 119 [ _5 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":483:15 discrim 1 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 119 [ _5 ])
        (nil)))
(insn 74 72 75 5 (set (reg/v:SI 134 [ stage ])
        (div:SI (reg:SI 120 [ _6 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":483:13 discrim 1 184 {*divsi3}
     (nil))
(debug_insn 75 74 76 5 (var_location:SI stage (reg/v:SI 134 [ stage ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":483:13 discrim 1 -1
     (nil))
(debug_insn 76 75 77 5 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":484:7 -1
     (nil))
(insn 77 76 80 5 (set (reg:SI 125 [ _12 ])
        (minus:SI (reg:SI 136 [ _32 ])
            (reg/v:SI 134 [ stage ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":484:45 99 {*subfsi3}
     (expr_list:REG_DEAD (reg:SI 136 [ _32 ])
        (expr_list:REG_DEAD (reg/v:SI 134 [ stage ])
            (nil))))
;;  succ:       7 [always]  count:440234144 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 125 128
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 125 128

;; basic block 6, loop depth 0, count 633507681 (estimated locally), maybe hot
;; Invalid sum of incoming counts 539739395 (estimated locally), should be 633507681 (estimated locally)
;;  prev block 5, next block 7, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       4 [85.2% (guessed)]  count:539739395 (estimated locally)
;; bb 6 artificial_defs: { }
;; bb 6 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 128 136 138 139
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 136 138 139
;; lr  def 	 121 122 123 124 125 130
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 128 136 138 139
;; live  gen 	 121 122 123 124 125 130
;; live  kill	
(code_label 80 77 81 6 6 (nil) [1 uses])
(note 81 80 82 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
(debug_insn 82 81 83 6 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:7 -1
     (nil))
(insn 83 82 84 6 (set (reg:SI 121 [ _8 ])
        (plus:SI (subreg/s/u:SI (reg/v:DI 139 [ cycle ]) 0)
            (const_int 1 [0x1]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:15 discrim 1 68 {*addsi3}
     (expr_list:REG_DEAD (reg/v:DI 139 [ cycle ])
        (nil)))
(insn 84 83 85 6 (set (reg:SI 122 [ _9 ])
        (plus:SI (reg:SI 121 [ _8 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:15 discrim 1 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 121 [ _8 ])
        (nil)))
(insn 85 84 87 6 (set (reg:SI 123 [ _10 ])
        (plus:SI (reg:SI 122 [ _9 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:15 discrim 1 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 122 [ _9 ])
        (nil)))
(insn 87 85 88 6 (set (reg/v:SI 130 [ stage ])
        (div:SI (reg:SI 123 [ _10 ])
            (subreg/s/u:SI (reg/v:DI 138 [ ii ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:13 discrim 1 184 {*divsi3}
     (nil))
(debug_insn 88 87 89 6 (var_location:SI stage (reg/v:SI 130 [ stage ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":488:13 discrim 1 -1
     (nil))
(debug_insn 89 88 90 6 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":489:7 -1
     (nil))
(insn 90 89 91 6 (set (reg:SI 124 [ _11 ])
        (plus:SI (reg/v:SI 130 [ stage ])
            (reg:SI 136 [ _32 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":489:45 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 136 [ _32 ])
        (expr_list:REG_DEAD (reg/v:SI 130 [ stage ])
            (nil))))
(insn 91 90 92 6 (set (reg:SI 125 [ _12 ])
        (plus:SI (reg:SI 124 [ _11 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":489:53 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 124 [ _11 ])
        (nil)))
;;  succ:       7 [always]  count:633507681 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 125 128
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 125 128

;; basic block 7, loop depth 0, count 1073741824 (estimated locally), maybe hot
;;  prev block 6, next block 1, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       5 [always]  count:440234144 (estimated locally) (FALLTHRU)
;;              6 [always]  count:633507681 (estimated locally) (FALLTHRU)
;; bb 7 artificial_defs: { }
;; bb 7 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 125 128
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 125 128
;; lr  def 	
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 125 128
;; live  gen 	
;; live  kill	
(code_label 92 91 93 7 7 (nil) [0 uses])
(note 93 92 94 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
(insn 94 93 0 7 (set (mem:SI (plus:DI (reg/f:DI 128 [ _24 ])
                (const_int 8 [0x8])) [6 _24->stage+0 S4 A32])
        (reg:SI 125 [ _12 ])) 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/f:DI 128 [ _24 ])
        (expr_list:REG_DEAD (reg:SI 125 [ _12 ])
            (nil))))
;;  succ:       EXIT [always]  count:1073741824 (estimated locally) (FALLTHRU) /builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc:491:1
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]


;; Function rotate_partial_schedule (_ZL23rotate_partial_scheduleP16partial_schedulei, funcdef_no=2519, decl_uid=99235, cgraph_uid=1567, symbol_order=1618)

Doloop: Processing loop 1.
starting the processing of deferred insns
ending the processing of deferred insns
setting blocks to analyze 7, 8, 9, 10, 11, 12, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 36 (  1.4)
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 34 (  1.3)
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 35 (  1.3)


starting region dump


rotate_partial_schedule

Dataflow summary:
def_info->table_size = 152, use_info->table_size = 0
;;  fully invalidated by EH 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr]
;;  hardware regs used 	 1 [1] 2 [2] 99 [ap] 109 [vscr] 110 [sfp]
;;  regular block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  eh block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  entry block defs 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 31 [31] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 96 [lr] 99 [ap] 109 [vscr] 110 [sfp]
;;  exit block uses 	 1 [1] 2 [2] 31 [31] 108 [vrsave] 109 [vscr] 110 [sfp]
;;  regs ever live 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 96 [lr] 98 [ca] 109 [vscr]
;;  ref usage 	r0={2d} r1={1d,27u} r2={1d,27u} r3={5d,3u} r4={5d,3u} r5={5d,2u} r6={3d} r7={3d} r8={3d} r9={3d} r10={3d} r11={2d} r12={2d} r13={2d} r31={1d,25u} r32={2d} r33={3d} r34={3d} r35={3d} r36={3d} r37={3d} r38={3d} r39={3d} r40={3d} r41={3d} r42={3d} r43={3d} r44={3d} r45={3d} r64={2d} r65={2d} r66={3d} r67={3d} r68={3d} r69={3d} r70={3d} r71={3d} r72={3d} r73={3d} r74={3d} r75={3d} r76={3d} r77={3d} r78={2d} r79={2d} r80={2d} r81={2d} r82={2d} r83={2d} r96={3d} r97={2d} r98={6d,2u} r99={1d,24u} r100={2d} r101={2d} r105={2d} r106={2d} r107={2d} r108={1u} r109={3d,3u} r110={1d,25u} r117={1d,5u} r118={2d,5u} r119={1d,8u} r120={1d,8u} r121={4d,8u} r123={4d,6u} r124={4d,8u} r128={1d,2u} r129={1d,1u} r130={1d,1u} r131={1d,1u} r132={1d,1u} r133={1d,1u} r134={1d,1u} r135={1d,1u} r136={1d,1u} r137={1d,1u} r139={1d,2u} r141={1d,2u} r142={1d,2u} r143={2d,4u} r146={1d,2u} r147={1d,2u} r150={1d,2u} r151={1d,1u} r152={1d,1u} r153={1d,2u} r154={1d,1u} r156={3d,3u} r157={3d,3u} r158={1d,1u} r159={1d} r160={1d} r161={1d,8u} r162={1d,5u} r163={1d,1u} r173={1d,1u} r174={1d,1u} r177={1d,1u} r178={1d} r179={1d,1u} r180={1d,1u} r181={1d} r182={1d,1u} r183={1d,1u} r185={1d} r186={1d} r187={3d,2u} r188={1d,1u} r189={2d,2u} r190={1d,3u} r191={1d,1u} r192={1d,2u} r193={1d,2u} r194={1d,2u} r195={1d,2u} r196={1d,1u} r197={1d,1u} r198={1d,1u} r199={1d,1u} r200={1d,2u} r201={1d,2u} r202={1d,2u} 
;;    total ref usage 518{241d,277u,0e} in 151{149 regular + 2 call} insns.
;; Reaching defs:
;;  sparse invalidated 	
;;  dense invalidated 	0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115
;;  reg->defs[] map:	0[0,1] 3[2,5] 4[6,9] 5[10,13] 6[14,15] 7[16,17] 8[18,19] 9[20,21] 10[22,23] 11[24,25] 12[26,27] 13[28,29] 32[30,31] 33[32,33] 34[34,35] 35[36,37] 36[38,39] 37[40,41] 38[42,43] 39[44,45] 40[46,47] 41[48,49] 42[50,51] 43[52,53] 44[54,55] 45[56,57] 64[58,59] 65[60,61] 66[62,63] 67[64,65] 68[66,67] 69[68,69] 70[70,71] 71[72,73] 72[74,75] 73[76,77] 74[78,79] 75[80,81] 76[82,83] 77[84,85] 78[86,87] 79[88,89] 80[90,91] 81[92,93] 82[94,95] 83[96,97] 96[98,99] 97[100,101] 98[102,103] 100[104,105] 101[106,107] 105[108,109] 106[110,111] 107[112,113] 109[114,115] 121[116,119] 123[120,123] 124[124,127] 141[128,128] 142[129,129] 143[130,130] 156[131,133] 157[134,136] 159[137,137] 160[138,138] 185[139,139] 186[140,140] 187[141,143] 188[144,144] 196[145,145] 197[146,146] 198[147,147] 199[148,148] 200[149,149] 201[150,150] 202[151,151] 
;; bb 7 artificial_defs: { }
;; bb 7 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 119 120 191
;; lr  def 	 141 142
;; live  in  	 109 [vscr] 143
;; live  gen 	 141 142
;; live  kill	
;; rd  in  	(2) 109[115],143[130]
;; rd  gen 	(2) 141[128],142[129]
;; rd  kill	(2) 141[128],142[129]
;;  UD chains for artificial uses at top

(code_label 145 96 71 7 17 (nil) [0 uses])
(note 71 145 72 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 72
;;      reg 143 { d130(bb 12 insn 142) }
(debug_insn 72 71 73 7 (var_location:SI i (reg/v:SI 143 [ i ])) -1
     (nil))
;;   UD chains for insn luid 1 uid 73
(debug_insn 73 72 74 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:7 -1
     (nil))
;;   UD chains for insn luid 2 uid 74
;;      reg 119 { }
(insn 74 73 75 7 (set (reg/v/f:DI 141 [ first_row ])
        (mem/f:DI (reg/f:DI 119 [ _3 ]) [103 *_3+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:19 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
;;   UD chains for insn luid 3 uid 75
;;      reg 141 { d128(bb 7 insn 74) }
(debug_insn 75 74 76 7 (var_location:DI first_row (reg/v/f:DI 141 [ first_row ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:19 -1
     (nil))
;;   UD chains for insn luid 4 uid 76
(debug_insn 76 75 77 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:7 -1
     (nil))
;;   UD chains for insn luid 5 uid 77
;;      reg 120 { }
(insn 77 76 78 7 (set (reg/v:SI 142 [ first_row_length ])
        (mem:SI (reg/f:DI 120 [ _4 ]) [6 *_4+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:11 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
;;   UD chains for insn luid 6 uid 78
;;      reg 142 { d129(bb 7 insn 77) }
(debug_insn 78 77 79 7 (var_location:SI first_row_length (reg/v:SI 142 [ first_row_length ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:11 -1
     (nil))
;;   UD chains for insn luid 7 uid 79
(debug_insn 79 78 80 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 -1
     (nil))
;;   UD chains for insn luid 8 uid 80
(debug_insn 80 79 81 7 (var_location:SI row (const_int 0 [0])) -1
     (nil))
;;   UD chains for insn luid 9 uid 81
(debug_insn 81 80 85 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 10 uid 85
;;      reg 191 { }
(jump_insn 85 81 86 7 (set (pc)
        (if_then_else (le (reg:CC 191)
                (const_int 0 [0]))
            (label_ref 135)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 191)
        (int_list:REG_BR_PROB 118111604 (nil)))
 -> 135)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143
;; rd  out 	(4) 109[115],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 8 artificial_defs: { }
;; bb 8 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 192 193
;; lr  def 	 185 186
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 185 186
;; live  kill	
;; rd  in  	(4) 109[115],141[128],142[129],143[130]
;; rd  gen 	(2) 185[139],186[140]
;; rd  kill	(2) 185[139],186[140]
;;  UD chains for artificial uses at top

(note 86 85 179 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 179
;;      reg 192 { }
(insn 179 86 180 8 (set (reg:SI 185 [ _27 ])
        (reg:SI 192 [ _27 ])) 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 192 [ _27 ])
        (expr_list:REG_UNUSED (reg:SI 185 [ _27 ])
            (nil))))
;;   UD chains for insn luid 1 uid 180
;;      reg 193 { }
(insn 180 179 89 8 (set (reg:CC 186)
        (reg:CC 193)) 569 {*movcc_cc}
     (expr_list:REG_UNUSED (reg:CC 186)
        (nil)))
;;   UD chains for insn luid 2 uid 89
;;      reg 193 { }
(jump_insn 89 180 90 8 (set (pc)
        (if_then_else (eq (reg:CC 193)
                (const_int 0 [0]))
            (label_ref 103)
            (pc))) 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 193)
        (int_list:REG_BR_PROB 107374188 (nil)))
 -> 103)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143
;; rd  out 	(4) 109[115],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 9 artificial_defs: { }
;; bb 9 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 119 120 146 158 194 195
;; lr  def 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr] 159 160
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 3 [3] 4 [4] 5 [5] 109 [vscr] 159 160
;; live  kill	 96 [lr]
;; rd  in  	(4) 109[115],141[128],142[129],143[130]
;; rd  gen 	(4) 3[5],109[115],159[137],160[138]
;; rd  kill	(10) 3[2,3,4,5],96[98,99],109[114,115],159[137],160[138]
;;  UD chains for artificial uses at top

(note 90 89 181 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 181
;;      reg 194 { }
(insn 181 90 92 9 (set (reg/f:DI 159 [ _85 ])
        (reg/f:DI 194 [ _85 ])) 687 {*movdi_internal64}
     (expr_list:REG_UNUSED (reg/f:DI 159 [ _85 ])
        (nil)))
;;   UD chains for insn luid 1 uid 92
;;      reg 158 { }
(insn 92 181 93 9 (set (reg:DI 5 5)
        (reg:DI 158 [ _84 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 158 [ _84 ])
        (nil)))
;;   UD chains for insn luid 2 uid 93
;;      reg 194 { }
(insn 93 92 94 9 (set (reg:DI 4 4)
        (reg/f:DI 194 [ _85 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 194 [ _85 ])
        (nil)))
;;   UD chains for insn luid 3 uid 94
;;      reg 119 { }
(insn 94 93 95 9 (set (reg:DI 3 3)
        (reg/f:DI 119 [ _3 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
;;   UD chains for insn luid 4 uid 95
;;      reg 1 { }
;;      reg 109 { d115(bb 9 insn 100) }
;;      reg 2 { }
;;      reg 3 { d2(bb 9 insn 94) }
;;      reg 4 { d6(bb 9 insn 93) }
;;      reg 5 { d10(bb 9 insn 92) }
(call_insn 95 94 182 9 (parallel [
            (set (reg:DI 3 3)
                (call (mem:SI (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>) [0 __builtin_memmove S4 A8])
                    (const_int 0 [0])))
            (use (const_int 0 [0]))
            (clobber (reg:DI 96 lr))
        ]) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 810 {*call_value_nonlocal_aixdi}
     (expr_list:REG_DEAD (reg:DI 5 5)
        (expr_list:REG_DEAD (reg:DI 4 4)
            (expr_list:REG_UNUSED (reg:DI 3 3)
                (expr_list:REG_CALL_DECL (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>)
                    (expr_list:REG_EH_REGION (const_int 0 [0])
                        (nil))))))
    (expr_list (use (reg:DI 2 2))
        (expr_list:DI (set (reg:DI 3 3)
                (reg:DI 3 3))
            (expr_list:DI (use (reg:DI 3 3))
                (expr_list:DI (use (reg:DI 4 4))
                    (expr_list:DI (use (reg:DI 5 5))
                        (nil)))))))
;;   UD chains for insn luid 5 uid 182
;;      reg 195 { }
(insn 182 95 97 9 (set (reg/f:DI 160 [ _90 ])
        (reg/f:DI 195 [ _90 ])) 687 {*movdi_internal64}
     (expr_list:REG_UNUSED (reg/f:DI 160 [ _90 ])
        (nil)))
;;   UD chains for insn luid 6 uid 97
;;      reg 146 { }
(insn 97 182 98 9 (set (reg:DI 5 5)
        (reg:DI 146 [ _47 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 146 [ _47 ])
        (nil)))
;;   UD chains for insn luid 7 uid 98
;;      reg 195 { }
(insn 98 97 99 9 (set (reg:DI 4 4)
        (reg/f:DI 195 [ _90 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 195 [ _90 ])
        (nil)))
;;   UD chains for insn luid 8 uid 99
;;      reg 120 { }
(insn 99 98 100 9 (set (reg:DI 3 3)
        (reg/f:DI 120 [ _4 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
;;   UD chains for insn luid 9 uid 100
;;      reg 1 { }
;;      reg 109 { d114(bb 9 insn 95) }
;;      reg 2 { }
;;      reg 3 { d4(bb 9 insn 99) }
;;      reg 4 { d8(bb 9 insn 98) }
;;      reg 5 { d12(bb 9 insn 97) }
(call_insn 100 99 103 9 (parallel [
            (set (reg:DI 3 3)
                (call (mem:SI (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>) [0 __builtin_memmove S4 A8])
                    (const_int 0 [0])))
            (use (const_int 0 [0]))
            (clobber (reg:DI 96 lr))
        ]) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 810 {*call_value_nonlocal_aixdi}
     (expr_list:REG_DEAD (reg:DI 5 5)
        (expr_list:REG_DEAD (reg:DI 4 4)
            (expr_list:REG_UNUSED (reg:DI 3 3)
                (expr_list:REG_CALL_DECL (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>)
                    (expr_list:REG_EH_REGION (const_int 0 [0])
                        (nil))))))
    (expr_list (use (reg:DI 2 2))
        (expr_list:DI (set (reg:DI 3 3)
                (reg:DI 3 3))
            (expr_list:DI (use (reg:DI 3 3))
                (expr_list:DI (use (reg:DI 4 4))
                    (expr_list:DI (use (reg:DI 5 5))
                        (nil)))))))
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143
;; rd  out 	(4) 109[115],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 10 artificial_defs: { }
;; bb 10 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 119 120 190
;; lr  def 	 121 123 124
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 121 123 124
;; live  kill	
;; rd  in  	(4) 109[115],141[128],142[129],143[130]
;; rd  gen 	(3) 121[116],123[120],124[124]
;; rd  kill	(12) 121[116,117,118,119],123[120,121,122,123],124[124,125,126,127]
;;  UD chains for artificial uses at top

(code_label 103 100 104 10 14 (nil) [1 uses])
(note 104 103 106 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 106
;;      reg 190 { }
(insn 106 104 107 10 (set (reg:DI 123 [ doloop.995 ])
        (zero_extend:DI (reg:SI 190 [ _8 ]))) 19 {zero_extendsidi2}
     (expr_list:REG_DEAD (reg:SI 190 [ _8 ])
        (nil)))
;;   UD chains for insn luid 1 uid 107
;;      reg 119 { }
(insn 107 106 109 10 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg/f:DI 119 [ _3 ])
            (const_int -8 [0xfffffffffffffff8]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
;;   UD chains for insn luid 2 uid 109
;;      reg 120 { }
(insn 109 107 187 10 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg/f:DI 120 [ _4 ])
            (const_int -4 [0xfffffffffffffffc]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 11 artificial_defs: { }
;; bb 11 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 123 124
;; lr  def 	 121 123 124 156 157 187 200 201 202
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	 121 123 124 156 157 187 200 201 202
;; live  kill	
;; rd  in  	(13) 109[115],121[116,118,119],123[120,122,123],124[124,126,127],141[128],142[129],143[130]
;; rd  gen 	(9) 121[117],123[121],124[125],156[131],157[134],187[141],200[149],201[150],202[151]
;; rd  kill	(24) 121[116,117,118,119],123[120,121,122,123],124[124,125,126,127],156[131,132,133],157[134,135,136],187[141,142,143],200[149],201[150],202[151]
;;  UD chains for artificial uses at top

(code_label 129 188 111 11 16 (nil) [0 uses])
(note 111 129 112 11 [bb 11] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 112
(debug_insn 112 111 113 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 113
(debug_insn 113 112 115 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
;;   UD chains for insn luid 2 uid 115
;;      reg 121 { d119(bb 24 insn 218) d118(bb 20 insn 193) d116(bb 10 insn 107) }
(insn 115 113 234 11 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 3 uid 234
;;      reg 121 { d119(bb 24 insn 218) d118(bb 20 insn 193) d116(bb 10 insn 107) }
(insn 234 115 116 11 (set (reg:DI 200)
        (plus:DI (reg:DI 121 [ ivtmp.998 ])
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 -1
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
;;   UD chains for insn luid 4 uid 116
;;      reg 200 { d149(bb 11 insn 234) }
(insn 116 234 118 11 (set (reg:DI 121 [ ivtmp.998 ])
        (reg:DI 200)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 5 uid 118
;;      reg 121 { d117(bb 11 insn 116) }
;;      reg 156 { d131(bb 11 insn 115) }
(insn 118 116 119 11 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
;;   UD chains for insn luid 6 uid 119
(debug_insn 119 118 121 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
;;   UD chains for insn luid 7 uid 121
;;      reg 124 { d127(bb 24 insn 222) d126(bb 20 insn 197) d124(bb 10 insn 109) }
(insn 121 119 235 11 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (nil))
;;   UD chains for insn luid 8 uid 235
;;      reg 124 { d127(bb 24 insn 222) d126(bb 20 insn 197) d124(bb 10 insn 109) }
(insn 235 121 122 11 (set (reg:DI 201)
        (plus:DI (reg:DI 124 [ ivtmp.1000 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 -1
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
;;   UD chains for insn luid 9 uid 122
;;      reg 201 { d150(bb 11 insn 235) }
(insn 122 235 124 11 (set (reg:DI 124 [ ivtmp.1000 ])
        (reg:DI 201)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 10 uid 124
;;      reg 124 { d125(bb 11 insn 122) }
;;      reg 157 { d134(bb 11 insn 121) }
(insn 124 122 125 11 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
;;   UD chains for insn luid 11 uid 125
(debug_insn 125 124 126 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
;;   UD chains for insn luid 12 uid 126
(debug_insn 126 125 127 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 13 uid 127
(debug_insn 127 126 236 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 14 uid 236
;;      reg 123 { d123(bb 24 insn 227) d122(bb 20 insn 202) d120(bb 10 insn 106) }
(insn 236 127 128 11 (set (reg:DI 202)
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (nil)))
;;   UD chains for insn luid 15 uid 128
;;      reg 202 { d151(bb 11 insn 236) }
(insn 128 236 130 11 (set (reg:DI 123 [ doloop.995 ])
        (reg:DI 202)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 16 uid 130
;;      reg 123 { d121(bb 11 insn 128) }
(insn 130 128 183 11 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (expr_list:REG_UNUSED (reg:CC 187)
            (nil))))
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 124 130 132 141 142 143 146 158 190 191 192 193 194 195 200 201 202
;; live  out 	 109 [vscr] 121 124 141 142 143 200 201 202
;; rd  out 	(9) 109[115],121[117],124[125],141[128],142[129],143[130],200[149],201[150],202[151]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 12 artificial_defs: { }
;; bb 12 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 118 130 132 141 142 143
;; lr  def 	 143 188
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 143 188
;; live  kill	
;; rd  in  	(4) 109[115],141[128],142[129],143[130]
;; rd  gen 	(2) 143[130],188[144]
;; rd  kill	(2) 143[130],188[144]
;;  UD chains for artificial uses at top

(code_label 135 177 136 12 13 (nil) [1 uses])
(note 136 135 137 12 [bb 12] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 137
(debug_insn 137 136 138 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:7 -1
     (nil))
;;   UD chains for insn luid 1 uid 138
;;      reg 130 { }
;;      reg 141 { d128(bb 7 insn 74) }
(insn 138 137 139 12 (set (mem/f:DI (reg/f:DI 130 [ _19 ]) [103 *_19+0 S8 A64])
        (reg/v/f:DI 141 [ first_row ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:26 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/v/f:DI 141 [ first_row ])
        (expr_list:REG_DEAD (reg/f:DI 130 [ _19 ])
            (nil))))
;;   UD chains for insn luid 2 uid 139
(debug_insn 139 138 140 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:7 -1
     (nil))
;;   UD chains for insn luid 3 uid 140
;;      reg 132 { }
;;      reg 142 { d129(bb 7 insn 77) }
(insn 140 139 141 12 (set (mem:SI (reg/f:DI 132 [ _21 ]) [6 *_21+0 S4 A32])
        (reg/v:SI 142 [ first_row_length ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:33 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/v:SI 142 [ first_row_length ])
        (expr_list:REG_DEAD (reg/f:DI 132 [ _21 ])
            (nil))))
;;   UD chains for insn luid 4 uid 141
(debug_insn 141 140 142 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:3 discrim 2 -1
     (nil))
;;   UD chains for insn luid 5 uid 142
;;      reg 143 { d130(bb 12 insn 142) }
(insn 142 141 143 12 (set (reg/v:SI 143 [ i ])
        (plus:SI (reg/v:SI 143 [ i ])
            (const_int 1 [0x1]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:3 discrim 2 68 {*addsi3}
     (nil))
;;   UD chains for insn luid 6 uid 143
;;      reg 143 { d130(bb 12 insn 142) }
(debug_insn 143 142 144 12 (var_location:SI i (reg/v:SI 143 [ i ])) -1
     (nil))
;;   UD chains for insn luid 7 uid 144
(debug_insn 144 143 146 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 -1
     (nil))
;;   UD chains for insn luid 8 uid 146
;;      reg 118 { }
;;      reg 143 { d130(bb 12 insn 142) }
(insn 146 144 147 12 (set (reg:CC 188)
        (compare:CC (reg:SI 118 [ _2 ])
            (reg/v:SI 143 [ i ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 844 {*cmpsi_signed}
     (expr_list:REG_DEAD (reg:SI 118 [ _2 ])
        (nil)))
;;   UD chains for insn luid 9 uid 147
;;      reg 188 { d144(bb 12 insn 146) }
(jump_insn 147 146 176 12 (set (pc)
        (if_then_else (ne (reg:CC 188)
                (const_int 0 [0]))
            (label_ref:DI 176)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 188)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 176)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 143
;; rd  out 	(2) 109[115],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 15 artificial_defs: { }
;; bb 15 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 143
;; live  gen 	
;; live  kill	
;; rd  in  	(2) 109[115],143[130]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 176 147 175 15 20 (nil) [1 uses])
(note 175 176 148 15 [bb 15] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 143
;; rd  out 	(2) 109[115],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 16 artificial_defs: { }
;; bb 16 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 124 130 132 141 142 143 146 158 190 191 192 193 194 195 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 124 141 142 143 200 201 202
;; live  gen 	
;; live  kill	
;; rd  in  	(9) 109[115],121[117],124[125],141[128],142[129],143[130],200[149],201[150],202[151]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 178 183 177 16 21 (nil) [0 uses])
(note 177 178 135 16 [bb 16] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 124 130 132 141 142 143 146 158 190 191 192 193 194 195 200 201 202
;; live  out 	 109 [vscr] 121 124 141 142 143 200 201 202
;; rd  out 	(9) 109[115],121[117],124[125],141[128],142[129],143[130],200[149],201[150],202[151]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 17 artificial_defs: { }
;; bb 17 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	
;; live  kill	
;; rd  in  	(10) 109[115],121[118,119],123[122,123],124[126,127],141[128],142[129],143[130]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(note 183 130 178 17 [bb 17] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143
;; rd  out 	(4) 109[115],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 18 artificial_defs: { }
;; bb 18 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 123
;; lr  def 	 196 197 198
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	 196 197 198
;; live  kill	
;; rd  in  	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;; rd  gen 	(3) 196[145],197[146],198[147]
;; rd  kill	(3) 196[145],197[146],198[147]
;;  UD chains for artificial uses at top

(note 187 109 184 18 [bb 18] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 184
;;      reg 123 { d120(bb 10 insn 106) }
(insn 184 187 185 18 (set (reg:DI 196)
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 185
;;      reg 196 { d145(bb 18 insn 184) }
(insn 185 184 186 18 (set (reg:DI 197)
        (plus:DI (reg:DI 196)
            (const_int 1 [0x1]))) -1
     (expr_list:REG_DEAD (reg:DI 196)
        (nil)))
;;   UD chains for insn luid 2 uid 186
;;      reg 197 { d146(bb 18 insn 185) }
(insn 186 185 213 18 (set (reg:DI 198)
        (and:DI (reg:DI 197)
            (const_int 1 [0x1]))) -1
     (expr_list:REG_DEAD (reg:DI 197)
        (nil)))
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195 198
;; live  out 	 109 [vscr] 121 123 124 141 142 143 198
;; rd  out 	(8) 109[115],121[116],123[120],124[124],141[128],142[129],143[130],198[147]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 19 artificial_defs: { }
;; bb 19 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
;; rd  in  	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(note 188 212 129 19 [bb 19] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 20 artificial_defs: { }
;; bb 20 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 123 124
;; lr  def 	 121 123 124 156 157 187
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	 121 123 124 156 157 187
;; live  kill	
;; rd  in  	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;; rd  gen 	(6) 121[118],123[122],124[126],156[132],157[135],187[142]
;; rd  kill	(21) 121[116,117,118,119],123[120,121,122,123],124[124,125,126,127],156[131,132,133],157[134,135,136],187[141,142,143]
;;  UD chains for artificial uses at top

(note 205 161 190 20 [bb 20] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 190
(debug_insn 190 205 191 20 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 191
(debug_insn 191 190 192 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
;;   UD chains for insn luid 2 uid 192
;;      reg 121 { d116(bb 10 insn 107) }
(insn 192 191 193 20 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 3 uid 193
;;      reg 121 { d116(bb 10 insn 107) }
(insn 193 192 194 20 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg:DI 121 [ ivtmp.998 ])
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 69 {*adddi3}
     (nil))
;;   UD chains for insn luid 4 uid 194
;;      reg 121 { d118(bb 20 insn 193) }
;;      reg 156 { d132(bb 20 insn 192) }
(insn 194 193 195 20 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
;;   UD chains for insn luid 5 uid 195
(debug_insn 195 194 196 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
;;   UD chains for insn luid 6 uid 196
;;      reg 124 { d124(bb 10 insn 109) }
(insn 196 195 197 20 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (nil))
;;   UD chains for insn luid 7 uid 197
;;      reg 124 { d124(bb 10 insn 109) }
(insn 197 196 198 20 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg:DI 124 [ ivtmp.1000 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 69 {*adddi3}
     (nil))
;;   UD chains for insn luid 8 uid 198
;;      reg 124 { d126(bb 20 insn 197) }
;;      reg 157 { d135(bb 20 insn 196) }
(insn 198 197 199 20 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
;;   UD chains for insn luid 9 uid 199
(debug_insn 199 198 200 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
;;   UD chains for insn luid 10 uid 200
(debug_insn 200 199 201 20 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 11 uid 201
(debug_insn 201 200 202 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 12 uid 202
;;      reg 123 { d120(bb 10 insn 106) }
(insn 202 201 203 20 (set (reg:DI 123 [ doloop.995 ])
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 69 {*adddi3}
     (nil))
;;   UD chains for insn luid 13 uid 203
;;      reg 123 { d122(bb 20 insn 202) }
(insn 203 202 204 20 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (nil))
;;   UD chains for insn luid 14 uid 204
;;      reg 187 { d142(bb 20 insn 203) }
(jump_insn 204 203 208 20 (set (pc)
        (if_then_else (ne (reg:CC 187)
                (const_int 0 [0]))
            (label_ref:DI 208)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 187)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 208)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[118],123[122],124[126],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 21 artificial_defs: { }
;; bb 21 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
;; rd  in  	(7) 109[115],121[118],123[122],124[126],141[128],142[129],143[130]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 208 204 207 21 22 (nil) [1 uses])
(note 207 208 210 21 [bb 21] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[118],123[122],124[126],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 22 artificial_defs: { }
;; bb 22 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
;; rd  in  	(10) 109[115],121[116,118],123[120,122],124[124,126],141[128],142[129],143[130]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 210 207 209 22 23 (nil) [1 uses])
(note 209 210 230 22 [bb 22] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(10) 109[115],121[116,118],123[120,122],124[124,126],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 23 artificial_defs: { }
;; bb 23 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195 198
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 198
;; lr  def 	 199
;; live  in  	 109 [vscr] 121 123 124 141 142 143 198
;; live  gen 	 199
;; live  kill	
;; rd  in  	(8) 109[115],121[116],123[120],124[124],141[128],142[129],143[130],198[147]
;; rd  gen 	(1) 199[148]
;; rd  kill	(1) 199[148]
;;  UD chains for artificial uses at top

(note 213 186 211 23 [bb 23] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 211
;;      reg 198 { d147(bb 18 insn 186) }
(insn 211 213 212 23 (set (reg:CC 199)
        (compare:CC (reg:DI 198)
            (const_int 0 [0]))) -1
     (expr_list:REG_DEAD (reg:DI 198)
        (nil)))
;;   UD chains for insn luid 1 uid 212
;;      reg 199 { d148(bb 23 insn 211) }
(jump_insn 212 211 188 23 (set (pc)
        (if_then_else (eq (reg:CC 199)
                (const_int 0 [0]))
            (label_ref 210)
            (pc))) -1
     (expr_list:REG_DEAD (reg:CC 199)
        (int_list:REG_BR_PROB 536870918 (nil)))
 -> 210)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[116],123[120],124[124],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 24 artificial_defs: { }
;; bb 24 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 124 130 132 141 142 143 146 158 190 191 192 193 194 195 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 124 200 201 202
;; lr  def 	 121 123 124 156 157 187
;; live  in  	 109 [vscr] 121 124 141 142 143 200 201 202
;; live  gen 	 121 123 124 156 157 187
;; live  kill	
;; rd  in  	(9) 109[115],121[117],124[125],141[128],142[129],143[130],200[149],201[150],202[151]
;; rd  gen 	(6) 121[119],123[123],124[127],156[133],157[136],187[143]
;; rd  kill	(21) 121[116,117,118,119],123[120,121,122,123],124[124,125,126,127],156[131,132,133],157[134,135,136],187[141,142,143]
;;  UD chains for artificial uses at top

(note 230 209 215 24 [bb 24] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 215
(debug_insn 215 230 216 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 216
(debug_insn 216 215 217 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
;;   UD chains for insn luid 2 uid 217
;;      reg 121 { d117(bb 11 insn 116) }
(insn 217 216 218 24 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
;;   UD chains for insn luid 3 uid 218
;;      reg 200 { d149(bb 11 insn 234) }
(insn 218 217 219 24 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg:DI 200)
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 200)
        (nil)))
;;   UD chains for insn luid 4 uid 219
;;      reg 121 { d119(bb 24 insn 218) }
;;      reg 156 { d133(bb 24 insn 217) }
(insn 219 218 220 24 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
;;   UD chains for insn luid 5 uid 220
(debug_insn 220 219 221 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
;;   UD chains for insn luid 6 uid 221
;;      reg 124 { d125(bb 11 insn 122) }
(insn 221 220 222 24 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
;;   UD chains for insn luid 7 uid 222
;;      reg 201 { d150(bb 11 insn 235) }
(insn 222 221 223 24 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg:DI 201)
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 201)
        (nil)))
;;   UD chains for insn luid 8 uid 223
;;      reg 124 { d127(bb 24 insn 222) }
;;      reg 157 { d136(bb 24 insn 221) }
(insn 223 222 224 24 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
;;   UD chains for insn luid 9 uid 224
(debug_insn 224 223 225 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
;;   UD chains for insn luid 10 uid 225
(debug_insn 225 224 226 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 11 uid 226
(debug_insn 226 225 227 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 12 uid 227
;;      reg 202 { d151(bb 11 insn 236) }
(insn 227 226 228 24 (set (reg:DI 123 [ doloop.995 ])
        (plus:DI (reg:DI 202)
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 202)
        (nil)))
;;   UD chains for insn luid 13 uid 228
;;      reg 123 { d123(bb 24 insn 227) }
(insn 228 227 229 24 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (nil))
;;   UD chains for insn luid 14 uid 229
;;      reg 187 { d143(bb 24 insn 228) }
(jump_insn 229 228 233 24 (set (pc)
        (if_then_else (ne (reg:CC 187)
                (const_int 0 [0]))
            (label_ref:DI 233)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 187)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 233)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[119],123[123],124[127],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 25 artificial_defs: { }
;; bb 25 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
;; rd  in  	(10) 109[115],121[119],123[123],124[127],141[128],142[129],143[130],156[133],157[136],187[143]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 233 229 232 25 24 (nil) [1 uses])
(note 232 233 0 25 [bb 25] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143
;; rd  out 	(7) 109[115],121[119],123[123],124[127],141[128],142[129],143[130]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }



Doloop: Function call in loop.
Doloop: The loop is not suitable.
Doloop: Processing loop 3.
starting the processing of deferred insns
ending the processing of deferred insns
setting blocks to analyze 11, 16, 24, 25
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 5 ( 0.19)
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 5 ( 0.19)
df_worklist_dataflow_doublequeue: n_basic_blocks 26 n_edges 34 count 5 ( 0.19)


starting region dump


rotate_partial_schedule

Dataflow summary:
def_info->table_size = 15, use_info->table_size = 0
;;  fully invalidated by EH 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr]
;;  hardware regs used 	 1 [1] 2 [2] 99 [ap] 109 [vscr] 110 [sfp]
;;  regular block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  eh block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  entry block defs 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 31 [31] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 96 [lr] 99 [ap] 109 [vscr] 110 [sfp]
;;  exit block uses 	 1 [1] 2 [2] 31 [31] 108 [vrsave] 109 [vscr] 110 [sfp]
;;  regs ever live 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 96 [lr] 98 [ca] 109 [vscr]
;;  ref usage 	r0={2d} r1={1d,27u} r2={1d,27u} r3={5d,3u} r4={5d,3u} r5={5d,2u} r6={3d} r7={3d} r8={3d} r9={3d} r10={3d} r11={2d} r12={2d} r13={2d} r31={1d,25u} r32={2d} r33={3d} r34={3d} r35={3d} r36={3d} r37={3d} r38={3d} r39={3d} r40={3d} r41={3d} r42={3d} r43={3d} r44={3d} r45={3d} r64={2d} r65={2d} r66={3d} r67={3d} r68={3d} r69={3d} r70={3d} r71={3d} r72={3d} r73={3d} r74={3d} r75={3d} r76={3d} r77={3d} r78={2d} r79={2d} r80={2d} r81={2d} r82={2d} r83={2d} r96={3d} r97={2d} r98={6d,2u} r99={1d,24u} r100={2d} r101={2d} r105={2d} r106={2d} r107={2d} r108={1u} r109={3d,3u} r110={1d,25u} r117={1d,5u} r118={2d,5u} r119={1d,8u} r120={1d,8u} r121={4d,8u} r123={4d,6u} r124={4d,8u} r128={1d,2u} r129={1d,1u} r130={1d,1u} r131={1d,1u} r132={1d,1u} r133={1d,1u} r134={1d,1u} r135={1d,1u} r136={1d,1u} r137={1d,1u} r139={1d,2u} r141={1d,2u} r142={1d,2u} r143={2d,4u} r146={1d,2u} r147={1d,2u} r150={1d,2u} r151={1d,1u} r152={1d,1u} r153={1d,2u} r154={1d,1u} r156={3d,3u} r157={3d,3u} r158={1d,1u} r159={1d} r160={1d} r161={1d,8u} r162={1d,5u} r163={1d,1u} r173={1d,1u} r174={1d,1u} r177={1d,1u} r178={1d} r179={1d,1u} r180={1d,1u} r181={1d} r182={1d,1u} r183={1d,1u} r185={1d} r186={1d} r187={3d,2u} r188={1d,1u} r189={2d,2u} r190={1d,3u} r191={1d,1u} r192={1d,2u} r193={1d,2u} r194={1d,2u} r195={1d,2u} r196={1d,1u} r197={1d,1u} r198={1d,1u} r199={1d,1u} r200={1d,2u} r201={1d,2u} r202={1d,2u} 
;;    total ref usage 518{241d,277u,0e} in 151{149 regular + 2 call} insns.
;; Reaching defs:
;;  sparse invalidated 	
;;  dense invalidated 	
;;  reg->defs[] map:	121[0,1] 123[2,3] 124[4,5] 156[6,7] 157[8,9] 187[10,11] 200[12,12] 201[13,13] 202[14,14] 
;; bb 11 artificial_defs: { }
;; bb 11 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 123 124
;; lr  def 	 121 123 124 156 157 187 200 201 202
;; live  in  	 121 123 124
;; live  gen 	 121 123 124 156 157 187 200 201 202
;; live  kill	
;; rd  in  	(3) 121[1],123[3],124[5]
;; rd  gen 	(9) 121[0],123[2],124[4],156[6],157[8],187[10],200[12],201[13],202[14]
;; rd  kill	(15) 121[0,1],123[2,3],124[4,5],156[6,7],157[8,9],187[10,11],200[12],201[13],202[14]
;;  UD chains for artificial uses at top

(code_label 129 188 111 11 16 (nil) [0 uses])
(note 111 129 112 11 [bb 11] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 112
(debug_insn 112 111 113 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 113
(debug_insn 113 112 115 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
;;   UD chains for insn luid 2 uid 115
;;      reg 121 { d1(bb 24 insn 218) }
(insn 115 113 234 11 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 3 uid 234
;;      reg 121 { d1(bb 24 insn 218) }
(insn 234 115 116 11 (set (reg:DI 200)
        (plus:DI (reg:DI 121 [ ivtmp.998 ])
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 -1
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
;;   UD chains for insn luid 4 uid 116
;;      reg 200 { d12(bb 11 insn 234) }
(insn 116 234 118 11 (set (reg:DI 121 [ ivtmp.998 ])
        (reg:DI 200)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 5 uid 118
;;      reg 121 { d0(bb 11 insn 116) }
;;      reg 156 { d6(bb 11 insn 115) }
(insn 118 116 119 11 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
;;   UD chains for insn luid 6 uid 119
(debug_insn 119 118 121 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
;;   UD chains for insn luid 7 uid 121
;;      reg 124 { d5(bb 24 insn 222) }
(insn 121 119 235 11 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (nil))
;;   UD chains for insn luid 8 uid 235
;;      reg 124 { d5(bb 24 insn 222) }
(insn 235 121 122 11 (set (reg:DI 201)
        (plus:DI (reg:DI 124 [ ivtmp.1000 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 -1
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
;;   UD chains for insn luid 9 uid 122
;;      reg 201 { d13(bb 11 insn 235) }
(insn 122 235 124 11 (set (reg:DI 124 [ ivtmp.1000 ])
        (reg:DI 201)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 10 uid 124
;;      reg 124 { d4(bb 11 insn 122) }
;;      reg 157 { d8(bb 11 insn 121) }
(insn 124 122 125 11 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
;;   UD chains for insn luid 11 uid 125
(debug_insn 125 124 126 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
;;   UD chains for insn luid 12 uid 126
(debug_insn 126 125 127 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 13 uid 127
(debug_insn 127 126 236 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 14 uid 236
;;      reg 123 { d3(bb 24 insn 227) }
(insn 236 127 128 11 (set (reg:DI 202)
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (nil)))
;;   UD chains for insn luid 15 uid 128
;;      reg 202 { d14(bb 11 insn 236) }
(insn 128 236 130 11 (set (reg:DI 123 [ doloop.995 ])
        (reg:DI 202)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 687 {*movdi_internal64}
     (nil))
;;   UD chains for insn luid 16 uid 130
;;      reg 123 { d2(bb 11 insn 128) }
(insn 130 128 183 11 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (expr_list:REG_UNUSED (reg:CC 187)
            (nil))))
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; live  out 	 121 124 200 201 202
;; rd  out 	(5) 121[0],124[4],200[12],201[13],202[14]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 16 artificial_defs: { }
;; bb 16 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 121 124 200 201 202
;; live  gen 	
;; live  kill	
;; rd  in  	(9) 121[0],123[2],124[4],156[6],157[8],187[10],200[12],201[13],202[14]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 178 183 177 16 21 (nil) [0 uses])
(note 177 178 135 16 [bb 16] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; live  out 	 121 124 200 201 202
;; rd  out 	(5) 121[0],124[4],200[12],201[13],202[14]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 24 artificial_defs: { }
;; bb 24 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 124 200 201 202
;; lr  def 	 121 123 124 156 157 187
;; live  in  	 121 124 200 201 202
;; live  gen 	 121 123 124 156 157 187
;; live  kill	
;; rd  in  	(5) 121[0],124[4],200[12],201[13],202[14]
;; rd  gen 	(6) 121[1],123[3],124[5],156[7],157[9],187[11]
;; rd  kill	(12) 121[0,1],123[2,3],124[4,5],156[6,7],157[8,9],187[10,11]
;;  UD chains for artificial uses at top

(note 230 209 215 24 [bb 24] NOTE_INSN_BASIC_BLOCK)
;;   UD chains for insn luid 0 uid 215
(debug_insn 215 230 216 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 1 uid 216
(debug_insn 216 215 217 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
;;   UD chains for insn luid 2 uid 217
;;      reg 121 { d0(bb 11 insn 116) }
(insn 217 216 218 24 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
;;   UD chains for insn luid 3 uid 218
;;      reg 200 { d12(bb 11 insn 234) }
(insn 218 217 219 24 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg:DI 200)
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 200)
        (nil)))
;;   UD chains for insn luid 4 uid 219
;;      reg 121 { d1(bb 24 insn 218) }
;;      reg 156 { d7(bb 24 insn 217) }
(insn 219 218 220 24 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
;;   UD chains for insn luid 5 uid 220
(debug_insn 220 219 221 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
;;   UD chains for insn luid 6 uid 221
;;      reg 124 { d4(bb 11 insn 122) }
(insn 221 220 222 24 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
;;   UD chains for insn luid 7 uid 222
;;      reg 201 { d13(bb 11 insn 235) }
(insn 222 221 223 24 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg:DI 201)
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 201)
        (nil)))
;;   UD chains for insn luid 8 uid 223
;;      reg 124 { d5(bb 24 insn 222) }
;;      reg 157 { d9(bb 24 insn 221) }
(insn 223 222 224 24 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
;;   UD chains for insn luid 9 uid 224
(debug_insn 224 223 225 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
;;   UD chains for insn luid 10 uid 225
(debug_insn 225 224 226 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
;;   UD chains for insn luid 11 uid 226
(debug_insn 226 225 227 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
;;   UD chains for insn luid 12 uid 227
;;      reg 202 { d14(bb 11 insn 236) }
(insn 227 226 228 24 (set (reg:DI 123 [ doloop.995 ])
        (plus:DI (reg:DI 202)
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 202)
        (nil)))
;;   UD chains for insn luid 13 uid 228
;;      reg 123 { d3(bb 24 insn 227) }
(insn 228 227 229 24 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (nil))
;;   UD chains for insn luid 14 uid 229
;;      reg 187 { d11(bb 24 insn 228) }
(jump_insn 229 228 233 24 (set (pc)
        (if_then_else (ne (reg:CC 187)
                (const_int 0 [0]))
            (label_ref:DI 233)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 187)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 233)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; live  out 	 121 123 124
;; rd  out 	(3) 121[1],123[3],124[5]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }


;; bb 25 artificial_defs: { }
;; bb 25 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 121 123 124
;; live  gen 	
;; live  kill	
;; rd  in  	(3) 121[1],123[3],124[5]
;; rd  gen 	(0) 
;; rd  kill	(0) 
;;  UD chains for artificial uses at top

(code_label 233 229 232 25 24 (nil) [1 uses])
(note 232 233 0 25 [bb 25] NOTE_INSN_BASIC_BLOCK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; live  out 	 121 123 124
;; rd  out 	(3) 121[1],123[3],124[5]
;;  UD chains for artificial uses at bottom
;;   reg 1 { }
;;   reg 2 { }
;;   reg 31 { }
;;   reg 99 { }
;;   reg 110 { }



Doloop: Inserting doloop pattern (runtime iterations).
deferring deletion of insn with uid = 229.
deferring rescan insn with uid = 239.
deferring rescan insn with uid = 238.
starting the processing of deferred insns
rescanning insn with uid = 238.
rescanning insn with uid = 239.
ending the processing of deferred insns


rotate_partial_schedule

Dataflow summary:
;;  fully invalidated by EH 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr]
;;  hardware regs used 	 1 [1] 2 [2] 99 [ap] 109 [vscr] 110 [sfp]
;;  regular block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  eh block artificial uses 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;;  entry block defs 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 31 [31] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 96 [lr] 99 [ap] 109 [vscr] 110 [sfp]
;;  exit block uses 	 1 [1] 2 [2] 31 [31] 108 [vrsave] 109 [vscr] 110 [sfp]
;;  regs ever live 	 1 [1] 2 [2] 3 [3] 4 [4] 5 [5] 96 [lr] 98 [ca] 109 [vscr]
;;  ref usage 	r0={2d} r1={1d,27u} r2={1d,27u} r3={5d,3u} r4={5d,3u} r5={5d,2u} r6={3d} r7={3d} r8={3d} r9={3d} r10={3d} r11={2d} r12={2d} r13={2d} r31={1d,25u} r32={2d} r33={3d} r34={3d} r35={3d} r36={3d} r37={3d} r38={3d} r39={3d} r40={3d} r41={3d} r42={3d} r43={3d} r44={3d} r45={3d} r64={2d} r65={2d} r66={3d} r67={3d} r68={3d} r69={3d} r70={3d} r71={3d} r72={3d} r73={3d} r74={3d} r75={3d} r76={3d} r77={3d} r78={2d} r79={2d} r80={2d} r81={2d} r82={2d} r83={2d} r96={3d} r97={2d} r98={6d,2u} r99={1d,24u} r100={2d} r101={2d} r105={2d} r106={2d} r107={2d} r108={1u} r109={3d,3u} r110={1d,25u} r117={1d,5u} r118={2d,5u} r119={1d,8u} r120={1d,8u} r121={4d,8u} r123={4d,6u} r124={4d,8u} r128={1d,2u} r129={1d,1u} r130={1d,1u} r131={1d,1u} r132={1d,1u} r133={1d,1u} r134={1d,1u} r135={1d,1u} r136={1d,1u} r137={1d,1u} r139={1d,2u} r141={1d,2u} r142={1d,2u} r143={2d,4u} r146={1d,2u} r147={1d,2u} r150={1d,2u} r151={1d,1u} r152={1d,1u} r153={1d,2u} r154={1d,1u} r156={3d,3u} r157={3d,3u} r158={1d,1u} r159={1d} r160={1d} r161={1d,8u} r162={1d,5u} r163={1d,1u} r173={1d,1u} r174={1d,1u} r177={1d,1u} r178={1d} r179={1d,1u} r180={1d,1u} r181={1d} r182={1d,1u} r183={1d,1u} r185={1d} r186={1d} r187={3d,1u} r188={1d,1u} r189={2d,2u} r190={1d,3u} r191={1d,1u} r192={1d,2u} r193={1d,2u} r194={1d,2u} r195={1d,2u} r196={1d,1u} r197={1d,2u} r198={1d,1u} r199={1d,1u} r200={1d,2u} r201={1d,2u} r202={1d,2u} r203={2d,2u} 
;;    total ref usage 522{243d,279u,0e} in 152{150 regular + 2 call} insns.
;; basic block 2, loop depth 0, count 22118277 (estimated locally), maybe hot
;;  prev block 0, next block 3, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       ENTRY [always]  count:22118277 (estimated locally) (FALLTHRU)
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 3 [3] 4 [4] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; lr  use 	 1 [1] 2 [2] 3 [3] 4 [4] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	 161 162 163
;; live  in  	 1 [1] 2 [2] 3 [3] 4 [4] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]
;; live  gen 	 161 162 163
;; live  kill	
(note 6 0 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 2 6 3 2 (set (reg/v/f:DI 161 [ ps ])
        (reg:DI 3 3 [ ps ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3284:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 3 3 [ ps ])
        (nil)))
(insn 3 2 4 2 (set (reg/v:DI 162 [ start_cycle ])
        (reg:DI 4 4 [ start_cycle ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3284:1 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 4 4 [ start_cycle ])
        (nil)))
(note 4 3 8 2 NOTE_INSN_FUNCTION_BEG)
(debug_insn 8 4 9 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3285:3 -1
     (nil))
(debug_insn 9 8 10 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3286:3 -1
     (nil))
(debug_insn 10 9 11 2 (var_location:SI D#61 (mem:SI (reg/v/f:DI 161 [ ps ]) [6 ps_33(D)->ii+0 S4 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3286:22 -1
     (nil))
(debug_insn 11 10 12 2 (var_location:SI last_row (plus:SI (debug_expr:SI D#61)
        (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3286:7 -1
     (nil))
(debug_insn 12 11 13 2 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3288:3 -1
     (nil))
(insn 13 12 14 2 (set (reg:CC 163)
        (compare:CC (reg/v:DI 162 [ start_cycle ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3288:3 845 {*cmpdi_signed}
     (nil))
(jump_insn 14 13 15 2 (set (pc)
        (if_then_else (eq (reg:CC 163)
                (const_int 0 [0]))
            (label_ref:DI 160)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3288:3 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 163)
        (int_list:REG_BR_PROB 365072228 (nil)))
 -> 160)
;;  succ:       14 [34.0% (guessed)]  count:7520214 (estimated locally)
;;              3 [66.0% (guessed)]  count:14598063 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 161 162
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 161 162

;; basic block 3, loop depth 0, count 14598063 (estimated locally), maybe hot
;;  prev block 2, next block 4, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       2 [66.0% (guessed)]  count:14598063 (estimated locally) (FALLTHRU)
;; bb 3 artificial_defs: { }
;; bb 3 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 161 162
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 161 162
;; lr  def 	 117 118 173 174 189
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 161 162
;; live  gen 	 117 118 173 174 189
;; live  kill	
(note 15 14 16 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
(insn 16 15 17 3 (set (reg:SI 117 [ _1 ])
        (mem:SI (reg/v/f:DI 161 [ ps ]) [6 ps_33(D)->ii+0 S4 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3286:22 560 {*movsi_internal1}
     (nil))
(debug_insn 17 16 23 3 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:3 -1
     (nil))
(insn 23 17 24 3 (set (reg:SI 173)
        (div:SI (subreg/s/u:SI (reg/v:DI 162 [ start_cycle ]) 0)
            (reg:SI 117 [ _1 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 184 {*divsi3}
     (nil))
(insn 24 23 25 3 (set (reg:SI 174)
        (mult:SI (reg:SI 173)
            (reg:SI 117 [ _1 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 159 {mulsi3}
     (expr_list:REG_DEAD (reg:SI 173)
        (nil)))
(insn 25 24 28 3 (set (reg:SI 118 [ _2 ])
        (minus:SI (subreg/s/u:SI (reg/v:DI 162 [ start_cycle ]) 0)
            (reg:SI 174))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 99 {*subfsi3}
     (expr_list:REG_DEAD (reg:SI 174)
        (nil)))
(insn 28 25 29 3 (set (reg:CC 189)
        (compare:CC (reg:SI 118 [ _2 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 844 {*cmpsi_signed}
     (nil))
(jump_insn 29 28 30 3 (set (pc)
        (if_then_else (ge (reg:CC 189)
                (const_int 0 [0]))
            (label_ref 32)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 930 {*cbranch}
     (int_list:REG_BR_PROB 633507684 (nil))
 -> 32)
;;  succ:       4 [41.0% (guessed)]  count:5985206 (estimated locally) (FALLTHRU)
;;              5 [59.0% (guessed)]  count:8612857 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162 189
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162 189

;; basic block 4, loop depth 0, count 5985206 (estimated locally), maybe hot
;;  prev block 3, next block 5, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       3 [41.0% (guessed)]  count:5985206 (estimated locally) (FALLTHRU)
;; bb 4 artificial_defs: { }
;; bb 4 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 117 118
;; lr  def 	 118 189
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162
;; live  gen 	 118 189
;; live  kill	
(note 30 29 31 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
(insn 31 30 168 4 (set (reg:SI 118 [ _2 ])
        (plus:SI (reg:SI 118 [ _2 ])
            (reg:SI 117 [ _1 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:22 discrim 1 68 {*addsi3}
     (nil))
(insn 168 31 32 4 (set (reg:CC 189)
        (compare:CC (reg:SI 118 [ _2 ])
            (const_int 0 [0]))) 844 {*cmpsi_signed}
     (nil))
;;  succ:       5 [always]  count:5985206 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162 189
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162 189

;; basic block 5, loop depth 0, count 14598063 (estimated locally), maybe hot
;;  prev block 4, next block 6, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       4 [always]  count:5985206 (estimated locally) (FALLTHRU)
;;              3 [59.0% (guessed)]  count:8612857 (estimated locally)
;; bb 5 artificial_defs: { }
;; bb 5 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162 189
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 189
;; lr  def 	
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162 189
;; live  gen 	
;; live  kill	
(code_label 32 168 33 5 11 (nil) [1 uses])
(note 33 32 34 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
(debug_insn 34 33 35 5 (var_location:SI backward_rotates (reg:SI 118 [ _2 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3291:20 discrim 4 -1
     (nil))
(debug_insn 35 34 36 5 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:3 -1
     (nil))
(debug_insn 36 35 37 5 (var_location:SI i (const_int 0 [0])) -1
     (nil))
(debug_insn 37 36 41 5 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 -1
     (nil))
(jump_insn 41 37 42 5 (set (pc)
        (if_then_else (le (reg:CC 189)
                (const_int 0 [0]))
            (label_ref 148)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 189)
        (int_list:REG_BR_PROB 118111604 (nil)))
 -> 148)
;;  succ:       6 [89.0% (guessed)]  count:12992276 (estimated locally) (FALLTHRU)
;;              13 [11.0% (guessed)]  count:1605787 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162

;; basic block 6, loop depth 0, count 12992276 (estimated locally), maybe hot
;;  prev block 5, next block 7, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       5 [89.0% (guessed)]  count:12992276 (estimated locally) (FALLTHRU)
;; bb 6 artificial_defs: { }
;; bb 6 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 117 118 161 162
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 117 161
;; lr  def 	 98 [ca] 119 120 128 129 130 131 132 137 139 143 146 147 150 151 152 153 154 158 177 178 179 180 181 182 183 190 191 192 193 194 195
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 117 118 161 162
;; live  gen 	 98 [ca] 119 120 128 129 130 131 132 137 139 143 146 147 150 151 152 153 154 158 177 178 179 180 181 182 183 190 191 192 193 194 195
;; live  kill	 98 [ca]
(note 42 41 43 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
(insn 43 42 44 6 (set (reg:SI 190 [ _8 ])
        (plus:SI (reg:SI 117 [ _1 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3286:7 68 {*addsi3}
     (nil))
(insn 44 43 45 6 (set (reg/f:DI 119 [ _3 ])
        (mem/f:DI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 8 [0x8])) [102 ps_33(D)->rows+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:35 687 {*movdi_internal64}
     (nil))
(insn 45 44 46 6 (set (reg/f:DI 120 [ _4 ])
        (mem/f:DI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 24 [0x18])) [104 ps_33(D)->rows_length+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:34 687 {*movdi_internal64}
     (nil))
(insn 46 45 47 6 (set (reg:DI 128 [ _17 ])
        (sign_extend:DI (reg:SI 190 [ _8 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:16 34 {extendsidi2}
     (nil))
(insn 47 46 48 6 (set (reg:DI 129 [ _18 ])
        (ashift:DI (reg:DI 128 [ _17 ])
            (const_int 3 [0x3]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:24 283 {ashldi3}
     (nil))
(insn 48 47 49 6 (set (reg/f:DI 130 [ _19 ])
        (plus:DI (reg/f:DI 119 [ _3 ])
            (reg:DI 129 [ _18 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:24 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 129 [ _18 ])
        (nil)))
(insn 49 48 50 6 (set (reg:DI 131 [ _20 ])
        (ashift:DI (reg:DI 128 [ _17 ])
            (const_int 2 [0x2]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:31 283 {ashldi3}
     (expr_list:REG_DEAD (reg:DI 128 [ _17 ])
        (nil)))
(insn 50 49 52 6 (set (reg/f:DI 132 [ _21 ])
        (plus:DI (reg/f:DI 120 [ _4 ])
            (reg:DI 131 [ _20 ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:31 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 131 [ _20 ])
        (nil)))
(insn 52 50 53 6 (set (reg:SI 154 [ _61 ])
        (plus:SI (reg:SI 117 [ _1 ])
            (const_int -2 [0xfffffffffffffffe]))) 68 {*addsi3}
     (expr_list:REG_DEAD (reg:SI 117 [ _1 ])
        (nil)))
(insn 53 52 54 6 (set (reg:DI 153 [ _60 ])
        (zero_extend:DI (reg:SI 154 [ _61 ]))) 19 {zero_extendsidi2}
     (expr_list:REG_DEAD (reg:SI 154 [ _61 ])
        (nil)))
(insn 54 53 55 6 (set (reg:DI 152 [ _59 ])
        (plus:DI (reg:DI 153 [ _60 ])
            (const_int 2 [0x2]))) 69 {*adddi3}
     (nil))
(insn 55 54 56 6 (set (reg:DI 151 [ _58 ])
        (ashift:DI (reg:DI 152 [ _59 ])
            (const_int 3 [0x3]))) 283 {ashldi3}
     (expr_list:REG_DEAD (reg:DI 152 [ _59 ])
        (nil)))
(insn 56 55 57 6 (set (reg/f:DI 150 [ _57 ])
        (plus:DI (reg/f:DI 119 [ _3 ])
            (reg:DI 151 [ _58 ]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 151 [ _58 ])
        (nil)))
(insn 57 56 58 6 (parallel [
            (set (reg:DI 178)
                (minus:DI (reg/f:DI 120 [ _4 ])
                    (reg/f:DI 150 [ _57 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg/f:DI 150 [ _57 ])
                    (reg/f:DI 120 [ _4 ])))
        ]) 109 {subfdi3_carry}
     (expr_list:REG_DEAD (reg/f:DI 150 [ _57 ])
        (expr_list:REG_UNUSED (reg:DI 178)
            (nil))))
(insn 58 57 59 6 (parallel [
            (set (reg:DI 179)
                (plus:DI (reg:DI 98 ca)
                    (const_int -1 [0xffffffffffffffff])))
            (clobber (reg:DI 98 ca))
        ]) 119 {subfdi3_carry_in_xx}
     (expr_list:REG_DEAD (reg:DI 98 ca)
        (expr_list:REG_UNUSED (reg:DI 98 ca)
            (nil))))
(insn 59 58 61 6 (set (reg:DI 177)
        (plus:DI (reg:DI 179)
            (const_int 1 [0x1]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 179)
        (nil)))
(insn 61 59 62 6 (set (reg:DI 147 [ _48 ])
        (plus:DI (reg:DI 153 [ _60 ])
            (const_int 1 [0x1]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 153 [ _60 ])
        (nil)))
(insn 62 61 63 6 (set (reg:DI 146 [ _47 ])
        (ashift:DI (reg:DI 147 [ _48 ])
            (const_int 2 [0x2]))) 283 {ashldi3}
     (nil))
(insn 63 62 64 6 (set (reg/f:DI 139 [ _30 ])
        (plus:DI (reg/f:DI 120 [ _4 ])
            (reg:DI 146 [ _47 ]))) 69 {*adddi3}
     (nil))
(insn 64 63 65 6 (parallel [
            (set (reg:DI 181)
                (minus:DI (reg/f:DI 119 [ _3 ])
                    (reg/f:DI 139 [ _30 ])))
            (set (reg:DI 98 ca)
                (leu:DI (reg/f:DI 139 [ _30 ])
                    (reg/f:DI 119 [ _3 ])))
        ]) 109 {subfdi3_carry}
     (expr_list:REG_DEAD (reg/f:DI 139 [ _30 ])
        (expr_list:REG_UNUSED (reg:DI 181)
            (nil))))
(insn 65 64 66 6 (parallel [
            (set (reg:DI 182)
                (plus:DI (reg:DI 98 ca)
                    (const_int -1 [0xffffffffffffffff])))
            (clobber (reg:DI 98 ca))
        ]) 119 {subfdi3_carry_in_xx}
     (expr_list:REG_DEAD (reg:DI 98 ca)
        (expr_list:REG_UNUSED (reg:DI 98 ca)
            (nil))))
(insn 66 65 68 6 (set (reg:DI 180)
        (plus:DI (reg:DI 182)
            (const_int 1 [0x1]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 182)
        (nil)))
(insn 68 66 69 6 (set (reg:SI 183)
        (ior:SI (subreg:SI (reg:DI 180) 0)
            (subreg:SI (reg:DI 177) 0))) 226 {*boolsi3}
     (expr_list:REG_DEAD (reg:DI 180)
        (expr_list:REG_DEAD (reg:DI 177)
            (nil))))
(insn 69 68 70 6 (set (reg:QI 137 [ _27 ])
        (subreg:QI (reg:SI 183) 0)) 567 {*movqi_internal}
     (expr_list:REG_DEAD (reg:SI 183)
        (nil)))
(insn 70 69 5 6 (set (reg:DI 158 [ _84 ])
        (ashift:DI (reg:DI 147 [ _48 ])
            (const_int 3 [0x3]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 283 {ashldi3}
     (expr_list:REG_DEAD (reg:DI 147 [ _48 ])
        (nil)))
(insn 5 70 169 6 (set (reg/v:SI 143 [ i ])
        (const_int 0 [0])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:10 560 {*movsi_internal1}
     (nil))
(insn 169 5 87 6 (set (reg:CC 191)
        (compare:CC (reg:SI 190 [ _8 ])
            (const_int 0 [0]))) 844 {*cmpsi_signed}
     (nil))
(insn 87 169 88 6 (set (reg:SI 192 [ _27 ])
        (zero_extend:SI (reg:QI 137 [ _27 ]))) 7 {zero_extendqisi2}
     (nil))
(insn 88 87 91 6 (set (reg:CC 193)
        (compare:CC (reg:SI 192 [ _27 ])
            (const_int 0 [0]))) 844 {*cmpsi_signed}
     (expr_list:REG_DEAD (reg:SI 185 [ _27 ])
        (nil)))
(insn 91 88 96 6 (set (reg/f:DI 194 [ _85 ])
        (plus:DI (reg/f:DI 119 [ _3 ])
            (const_int 8 [0x8]))) 69 {*adddi3}
     (nil))
(insn 96 91 145 6 (set (reg/f:DI 195 [ _90 ])
        (plus:DI (reg/f:DI 120 [ _4 ])
            (const_int 4 [0x4]))) 69 {*adddi3}
     (nil))
;;  succ:       7 [always]  count:12992276 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 118 119 120 130 132 137 143 146 158 161 162 190 191
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 137 143 146 158 161 162 190 191

;; basic block 7, loop depth 1, count 118111600 (estimated locally), maybe hot
;;  prev block 6, next block 8, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       15 [always]  count:105119324 (estimated locally) (FALLTHRU,DFS_BACK)
;;              6 [always]  count:12992276 (estimated locally) (FALLTHRU)
;; bb 7 artificial_defs: { }
;; bb 7 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 119 120 191
;; lr  def 	 141 142
;; live  in  	 109 [vscr] 143
;; live  gen 	 141 142
;; live  kill	
(code_label 145 96 71 7 17 (nil) [0 uses])
(note 71 145 72 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
(debug_insn 72 71 73 7 (var_location:SI i (reg/v:SI 143 [ i ])) -1
     (nil))
(debug_insn 73 72 74 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:7 -1
     (nil))
(insn 74 73 75 7 (set (reg/v/f:DI 141 [ first_row ])
        (mem/f:DI (reg/f:DI 119 [ _3 ]) [103 *_3+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:19 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
(debug_insn 75 74 76 7 (var_location:DI first_row (reg/v/f:DI 141 [ first_row ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3296:19 -1
     (nil))
(debug_insn 76 75 77 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:7 -1
     (nil))
(insn 77 76 78 7 (set (reg/v:SI 142 [ first_row_length ])
        (mem:SI (reg/f:DI 120 [ _4 ]) [6 *_4+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:11 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
(debug_insn 78 77 79 7 (var_location:SI first_row_length (reg/v:SI 142 [ first_row_length ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3297:11 -1
     (nil))
(debug_insn 79 78 80 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 -1
     (nil))
(debug_insn 80 79 81 7 (var_location:SI row (const_int 0 [0])) -1
     (nil))
(debug_insn 81 80 85 7 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
(jump_insn 85 81 86 7 (set (pc)
        (if_then_else (le (reg:CC 191)
                (const_int 0 [0]))
            (label_ref 135)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 191)
        (int_list:REG_BR_PROB 118111604 (nil)))
 -> 135)
;;  succ:       8 [89.0% (guessed)]  count:105119324 (estimated locally) (FALLTHRU)
;;              12 [11.0% (guessed)]  count:12992276 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143

;; basic block 8, loop depth 1, count 105119324 (estimated locally), maybe hot
;;  prev block 7, next block 9, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       7 [89.0% (guessed)]  count:105119324 (estimated locally) (FALLTHRU)
;; bb 8 artificial_defs: { }
;; bb 8 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 192 193
;; lr  def 	 185 186
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 185 186
;; live  kill	
(note 86 85 179 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
(insn 179 86 180 8 (set (reg:SI 185 [ _27 ])
        (reg:SI 192 [ _27 ])) 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 192 [ _27 ])
        (expr_list:REG_UNUSED (reg:SI 185 [ _27 ])
            (nil))))
(insn 180 179 89 8 (set (reg:CC 186)
        (reg:CC 193)) 569 {*movcc_cc}
     (expr_list:REG_UNUSED (reg:CC 186)
        (nil)))
(jump_insn 89 180 90 8 (set (pc)
        (if_then_else (eq (reg:CC 193)
                (const_int 0 [0]))
            (label_ref 103)
            (pc))) 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 193)
        (int_list:REG_BR_PROB 107374188 (nil)))
 -> 103)
;;  succ:       10 [10.0% (guessed)]  count:10511933 (estimated locally)
;;              9 [90.0% (guessed)]  count:94607391 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143

;; basic block 9, loop depth 1, count 94607391 (estimated locally), maybe hot
;;  prev block 8, next block 10, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       8 [90.0% (guessed)]  count:94607391 (estimated locally) (FALLTHRU)
;; bb 9 artificial_defs: { }
;; bb 9 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 119 120 146 158 194 195
;; lr  def 	 0 [0] 3 [3] 4 [4] 5 [5] 6 [6] 7 [7] 8 [8] 9 [9] 10 [10] 11 [11] 12 [12] 13 [13] 32 [0] 33 [1] 34 [2] 35 [3] 36 [4] 37 [5] 38 [6] 39 [7] 40 [8] 41 [9] 42 [10] 43 [11] 44 [12] 45 [13] 64 [0] 65 [1] 66 [2] 67 [3] 68 [4] 69 [5] 70 [6] 71 [7] 72 [8] 73 [9] 74 [10] 75 [11] 76 [12] 77 [13] 78 [14] 79 [15] 80 [16] 81 [17] 82 [18] 83 [19] 96 [lr] 97 [ctr] 98 [ca] 100 [0] 101 [1] 105 [5] 106 [6] 107 [7] 109 [vscr] 159 160
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 3 [3] 4 [4] 5 [5] 109 [vscr] 159 160
;; live  kill	 96 [lr]
(note 90 89 181 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
(insn 181 90 92 9 (set (reg/f:DI 159 [ _85 ])
        (reg/f:DI 194 [ _85 ])) 687 {*movdi_internal64}
     (expr_list:REG_UNUSED (reg/f:DI 159 [ _85 ])
        (nil)))
(insn 92 181 93 9 (set (reg:DI 5 5)
        (reg:DI 158 [ _84 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 158 [ _84 ])
        (nil)))
(insn 93 92 94 9 (set (reg:DI 4 4)
        (reg/f:DI 194 [ _85 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 194 [ _85 ])
        (nil)))
(insn 94 93 95 9 (set (reg:DI 3 3)
        (reg/f:DI 119 [ _3 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
(call_insn 95 94 182 9 (parallel [
            (set (reg:DI 3 3)
                (call (mem:SI (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>) [0 __builtin_memmove S4 A8])
                    (const_int 0 [0])))
            (use (const_int 0 [0]))
            (clobber (reg:DI 96 lr))
        ]) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 810 {*call_value_nonlocal_aixdi}
     (expr_list:REG_DEAD (reg:DI 5 5)
        (expr_list:REG_DEAD (reg:DI 4 4)
            (expr_list:REG_UNUSED (reg:DI 3 3)
                (expr_list:REG_CALL_DECL (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>)
                    (expr_list:REG_EH_REGION (const_int 0 [0])
                        (nil))))))
    (expr_list (use (reg:DI 2 2))
        (expr_list:DI (set (reg:DI 3 3)
                (reg:DI 3 3))
            (expr_list:DI (use (reg:DI 3 3))
                (expr_list:DI (use (reg:DI 4 4))
                    (expr_list:DI (use (reg:DI 5 5))
                        (nil)))))))
(insn 182 95 97 9 (set (reg/f:DI 160 [ _90 ])
        (reg/f:DI 195 [ _90 ])) 687 {*movdi_internal64}
     (expr_list:REG_UNUSED (reg/f:DI 160 [ _90 ])
        (nil)))
(insn 97 182 98 9 (set (reg:DI 5 5)
        (reg:DI 146 [ _47 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 146 [ _47 ])
        (nil)))
(insn 98 97 99 9 (set (reg:DI 4 4)
        (reg/f:DI 195 [ _90 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 195 [ _90 ])
        (nil)))
(insn 99 98 100 9 (set (reg:DI 3 3)
        (reg/f:DI 120 [ _4 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
(call_insn 100 99 103 9 (parallel [
            (set (reg:DI 3 3)
                (call (mem:SI (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>) [0 __builtin_memmove S4 A8])
                    (const_int 0 [0])))
            (use (const_int 0 [0]))
            (clobber (reg:DI 96 lr))
        ]) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 810 {*call_value_nonlocal_aixdi}
     (expr_list:REG_DEAD (reg:DI 5 5)
        (expr_list:REG_DEAD (reg:DI 4 4)
            (expr_list:REG_UNUSED (reg:DI 3 3)
                (expr_list:REG_CALL_DECL (symbol_ref:DI ("memmove") [flags 0x41]  <function_decl 0x3fff856f9a00 __builtin_memmove>)
                    (expr_list:REG_EH_REGION (const_int 0 [0])
                        (nil))))))
    (expr_list (use (reg:DI 2 2))
        (expr_list:DI (set (reg:DI 3 3)
                (reg:DI 3 3))
            (expr_list:DI (use (reg:DI 3 3))
                (expr_list:DI (use (reg:DI 4 4))
                    (expr_list:DI (use (reg:DI 5 5))
                        (nil)))))))
;;  succ:       12 [always]  count:94607391 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143

;; basic block 10, loop depth 1, count 10511933 (estimated locally), maybe hot
;;  prev block 9, next block 18, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       8 [10.0% (guessed)]  count:10511933 (estimated locally)
;; bb 10 artificial_defs: { }
;; bb 10 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 119 120 190
;; lr  def 	 121 123 124
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 121 123 124
;; live  kill	
(code_label 103 100 104 10 14 (nil) [1 uses])
(note 104 103 106 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
(insn 106 104 107 10 (set (reg:DI 123 [ doloop.995 ])
        (zero_extend:DI (reg:SI 190 [ _8 ]))) 19 {zero_extendsidi2}
     (expr_list:REG_DEAD (reg:SI 190 [ _8 ])
        (nil)))
(insn 107 106 109 10 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg/f:DI 119 [ _3 ])
            (const_int -8 [0xfffffffffffffff8]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg/f:DI 119 [ _3 ])
        (nil)))
(insn 109 107 187 10 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg/f:DI 120 [ _4 ])
            (const_int -4 [0xfffffffffffffffc]))) 69 {*adddi3}
     (expr_list:REG_DEAD (reg/f:DI 120 [ _4 ])
        (nil)))
;;  succ:       18 [always]  count:10511933 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 18, loop depth 1, count 10511933 (estimated locally), maybe hot
;;  prev block 10, next block 23, flags: (NEW, RTL, MODIFIED)
;;  pred:       10 [always]  count:10511933 (estimated locally) (FALLTHRU)
;; bb 18 artificial_defs: { }
;; bb 18 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 123
;; lr  def 	 196 197 198
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	 196 197 198
;; live  kill	
(note 187 109 184 18 [bb 18] NOTE_INSN_BASIC_BLOCK)
(insn 184 187 185 18 (set (reg:DI 196)
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) -1
     (nil))
(insn 185 184 186 18 (set (reg:DI 197)
        (plus:DI (reg:DI 196)
            (const_int 1 [0x1]))) -1
     (expr_list:REG_DEAD (reg:DI 196)
        (nil)))
(insn 186 185 213 18 (set (reg:DI 198)
        (and:DI (reg:DI 197)
            (const_int 1 [0x1]))) -1
     (expr_list:REG_DEAD (reg:DI 197)
        (nil)))
;;  succ:       23 [always]  count:10511933 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195 198
;; live  out 	 109 [vscr] 121 123 124 141 142 143 198

;; basic block 23, loop depth 1, count 10511934 (estimated locally), maybe hot
;;  prev block 18, next block 19, flags: (NEW, RTL, MODIFIED)
;;  pred:       18 [always]  count:10511933 (estimated locally) (FALLTHRU)
;; bb 23 artificial_defs: { }
;; bb 23 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195 198
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 198
;; lr  def 	 199
;; live  in  	 109 [vscr] 121 123 124 141 142 143 198
;; live  gen 	 199
;; live  kill	
(note 213 186 211 23 [bb 23] NOTE_INSN_BASIC_BLOCK)
(insn 211 213 212 23 (set (reg:CC 199)
        (compare:CC (reg:DI 198)
            (const_int 0 [0]))) -1
     (expr_list:REG_DEAD (reg:DI 198)
        (nil)))
(jump_insn 212 211 188 23 (set (pc)
        (if_then_else (eq (reg:CC 199)
                (const_int 0 [0]))
            (label_ref 210)
            (pc))) -1
     (expr_list:REG_DEAD (reg:CC 199)
        (int_list:REG_BR_PROB 536870918 (nil)))
 -> 210)
;;  succ:       19 [50.0% (adjusted)]  count:5255967 (estimated locally) (FALLTHRU)
;;              22 [50.0% (adjusted)]  count:5255967 (estimated locally)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 19, loop depth 1, count 5255967 (estimated locally), maybe hot
;;  prev block 23, next block 11, flags: (NEW, RTL, MODIFIED)
;;  pred:       23 [50.0% (adjusted)]  count:5255967 (estimated locally) (FALLTHRU)
;; bb 19 artificial_defs: { }
;; bb 19 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
(note 188 212 129 19 [bb 19] NOTE_INSN_BASIC_BLOCK)
;;  succ:       20 [always]  count:5255967 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 11, loop depth 2, count 42525546 (estimated locally), maybe hot
;; Invalid sum of incoming counts 47781512 (estimated locally), should be 42525546 (estimated locally)
;;  prev block 19, next block 17, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       22 [always]  count:9933778 (estimated locally) (FALLTHRU,DFS_BACK)
;;              25 [always]  count:37847734 (estimated locally) (FALLTHRU,DFS_BACK)
;; bb 11 artificial_defs: { }
;; bb 11 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 123 124
;; lr  def 	 121 123 124 156 157 187 200 201 202
;; live  in  	 121 123 124
;; live  gen 	 121 123 124 156 157 187 200 201 202
;; live  kill	
(code_label 129 188 111 11 16 (nil) [0 uses])
(note 111 129 112 11 [bb 11] NOTE_INSN_BASIC_BLOCK)
(debug_insn 112 111 113 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 113 112 115 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
(insn 115 113 234 11 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (nil))
(insn 234 115 116 11 (set (reg:DI 200)
        (plus:DI (reg:DI 121 [ ivtmp.998 ])
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 -1
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
(insn 116 234 118 11 (set (reg:DI 121 [ ivtmp.998 ])
        (reg:DI 200)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (nil))
(insn 118 116 119 11 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
(debug_insn 119 118 121 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
(insn 121 119 235 11 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (nil))
(insn 235 121 122 11 (set (reg:DI 201)
        (plus:DI (reg:DI 124 [ ivtmp.1000 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 -1
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
(insn 122 235 124 11 (set (reg:DI 124 [ ivtmp.1000 ])
        (reg:DI 201)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 687 {*movdi_internal64}
     (nil))
(insn 124 122 125 11 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
(debug_insn 125 124 126 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
(debug_insn 126 125 127 11 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 127 126 236 11 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
(insn 236 127 128 11 (set (reg:DI 202)
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (nil)))
(insn 128 236 130 11 (set (reg:DI 123 [ doloop.995 ])
        (reg:DI 202)) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 687 {*movdi_internal64}
     (nil))
(insn 130 128 183 11 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (expr_list:REG_DEAD (reg:DI 123 [ doloop.995 ])
        (expr_list:REG_UNUSED (reg:CC 187)
            (nil))))
;;  succ:       16 [always]  count:42525546 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; live  out 	 121 124 200 201 202

;; basic block 17, loop depth 1, count 10511933 (estimated locally), maybe hot
;; Invalid sum of incoming counts 5255966 (estimated locally), should be 10511933 (estimated locally)
;;  prev block 11, next block 16, flags: (NEW, RTL, MODIFIED)
;;  pred:       24 [11.0% (guessed)]  count:4677810 (estimated locally) (FALLTHRU,LOOP_EXIT)
;;              20 [11.0% (guessed)]  count:578156 (estimated locally) (FALLTHRU,LOOP_EXIT)
;; bb 17 artificial_defs: { }
;; bb 17 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	
;; live  kill	
(note 183 130 178 17 [bb 17] NOTE_INSN_BASIC_BLOCK)
;;  succ:       12 [always]  count:10511933 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 141 142 143

;; basic block 16, loop depth 2, count 42525545 (estimated locally), maybe hot
;;  prev block 17, next block 12, flags: (NEW, RTL, MODIFIED)
;;  pred:       11 [always]  count:42525546 (estimated locally) (FALLTHRU)
;; bb 16 artificial_defs: { }
;; bb 16 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 121 124 200 201 202
;; live  gen 	
;; live  kill	
(code_label 178 183 177 16 21 (nil) [0 uses])
(note 177 178 135 16 [bb 16] NOTE_INSN_BASIC_BLOCK)
;;  succ:       24 [always]  count:42525545 (estimated locally) (FALLTHRU,DFS_BACK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; live  out 	 121 124 200 201 202

;; basic block 12, loop depth 1, count 118111600 (estimated locally), maybe hot
;;  prev block 16, next block 15, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       7 [11.0% (guessed)]  count:12992276 (estimated locally)
;;              17 [always]  count:10511933 (estimated locally) (FALLTHRU)
;;              9 [always]  count:94607391 (estimated locally) (FALLTHRU)
;; bb 12 artificial_defs: { }
;; bb 12 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 118 130 132 141 142 143
;; lr  def 	 143 188
;; live  in  	 109 [vscr] 141 142 143
;; live  gen 	 143 188
;; live  kill	
(code_label 135 177 136 12 13 (nil) [1 uses])
(note 136 135 137 12 [bb 12] NOTE_INSN_BASIC_BLOCK)
(debug_insn 137 136 138 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:7 -1
     (nil))
(insn 138 137 139 12 (set (mem/f:DI (reg/f:DI 130 [ _19 ]) [103 *_19+0 S8 A64])
        (reg/v/f:DI 141 [ first_row ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3305:26 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/v/f:DI 141 [ first_row ])
        (expr_list:REG_DEAD (reg/f:DI 130 [ _19 ])
            (nil))))
(debug_insn 139 138 140 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:7 -1
     (nil))
(insn 140 139 141 12 (set (mem:SI (reg/f:DI 132 [ _21 ]) [6 *_21+0 S4 A32])
        (reg/v:SI 142 [ first_row_length ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3306:33 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/v:SI 142 [ first_row_length ])
        (expr_list:REG_DEAD (reg/f:DI 132 [ _21 ])
            (nil))))
(debug_insn 141 140 142 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:3 discrim 2 -1
     (nil))
(insn 142 141 143 12 (set (reg/v:SI 143 [ i ])
        (plus:SI (reg/v:SI 143 [ i ])
            (const_int 1 [0x1]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:3 discrim 2 68 {*addsi3}
     (nil))
(debug_insn 143 142 144 12 (var_location:SI i (reg/v:SI 143 [ i ])) -1
     (nil))
(debug_insn 144 143 146 12 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 -1
     (nil))
(insn 146 144 147 12 (set (reg:CC 188)
        (compare:CC (reg:SI 118 [ _2 ])
            (reg/v:SI 143 [ i ]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 844 {*cmpsi_signed}
     (expr_list:REG_DEAD (reg:SI 118 [ _2 ])
        (nil)))
(jump_insn 147 146 176 12 (set (pc)
        (if_then_else (ne (reg:CC 188)
                (const_int 0 [0]))
            (label_ref:DI 176)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3294:17 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 188)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 176)
;;  succ:       15 [89.0% (guessed)]  count:105119324 (estimated locally)
;;              13 [11.0% (guessed)]  count:12992276 (estimated locally) (FALLTHRU,LOOP_EXIT)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 143

;; basic block 15, loop depth 1, count 105119324 (estimated locally), maybe hot
;;  prev block 12, next block 13, flags: (NEW, RTL, MODIFIED)
;;  pred:       12 [89.0% (guessed)]  count:105119324 (estimated locally)
;; bb 15 artificial_defs: { }
;; bb 15 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 143
;; live  gen 	
;; live  kill	
(code_label 176 147 175 15 20 (nil) [1 uses])
(note 175 176 148 15 [bb 15] NOTE_INSN_BASIC_BLOCK)
;;  succ:       7 [always]  count:105119324 (estimated locally) (FALLTHRU,DFS_BACK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 130 132 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 143

;; basic block 13, loop depth 0, count 14598063 (estimated locally), maybe hot
;;  prev block 15, next block 14, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       5 [11.0% (guessed)]  count:1605787 (estimated locally)
;;              12 [11.0% (guessed)]  count:12992276 (estimated locally) (FALLTHRU,LOOP_EXIT)
;; bb 13 artificial_defs: { }
;; bb 13 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp] 161 162
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 161 162
;; lr  def 	 133 134 135 136
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 161 162
;; live  gen 	 133 134 135 136
;; live  kill	
(code_label 148 175 149 13 12 (nil) [1 uses])
(note 149 148 150 13 [bb 13] NOTE_INSN_BASIC_BLOCK)
(debug_insn 150 149 151 13 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3309:3 -1
     (nil))
(insn 151 150 152 13 (set (reg:SI 133 [ _22 ])
        (mem:SI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 36 [0x24])) [6 ps_33(D)->max_cycle+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3309:7 560 {*movsi_internal1}
     (nil))
(insn 152 151 153 13 (set (reg:SI 134 [ _23 ])
        (minus:SI (reg:SI 133 [ _22 ])
            (subreg/s/u:SI (reg/v:DI 162 [ start_cycle ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3309:17 99 {*subfsi3}
     (expr_list:REG_DEAD (reg:SI 133 [ _22 ])
        (nil)))
(insn 153 152 154 13 (set (mem:SI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 36 [0x24])) [6 ps_33(D)->max_cycle+0 S4 A32])
        (reg:SI 134 [ _23 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3309:17 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 134 [ _23 ])
        (nil)))
(debug_insn 154 153 155 13 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3310:3 -1
     (nil))
(insn 155 154 156 13 (set (reg:SI 135 [ _24 ])
        (mem:SI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 32 [0x20])) [6 ps_33(D)->min_cycle+0 S4 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3310:7 560 {*movsi_internal1}
     (nil))
(insn 156 155 157 13 (set (reg:SI 136 [ _25 ])
        (minus:SI (reg:SI 135 [ _24 ])
            (subreg/s/u:SI (reg/v:DI 162 [ start_cycle ]) 0))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3310:17 99 {*subfsi3}
     (expr_list:REG_DEAD (reg/v:DI 162 [ start_cycle ])
        (expr_list:REG_DEAD (reg:SI 135 [ _24 ])
            (nil))))
(insn 157 156 160 13 (set (mem:SI (plus:DI (reg/v/f:DI 161 [ ps ])
                (const_int 32 [0x20])) [6 ps_33(D)->min_cycle+0 S4 A64])
        (reg:SI 136 [ _25 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3310:17 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg/v/f:DI 161 [ ps ])
        (expr_list:REG_DEAD (reg:SI 136 [ _25 ])
            (nil))))
;;  succ:       14 [always]  count:14598063 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]

;; basic block 14, loop depth 0, count 22118277 (estimated locally), maybe hot
;;  prev block 13, next block 20, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       13 [always]  count:14598063 (estimated locally) (FALLTHRU)
;;              2 [34.0% (guessed)]  count:7520214 (estimated locally)
;; bb 14 artificial_defs: { }
;; bb 14 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]
;; live  gen 	
;; live  kill	
(code_label 160 157 161 14 9 (nil) [1 uses])
(note 161 160 205 14 [bb 14] NOTE_INSN_BASIC_BLOCK)
;;  succ:       EXIT [always]  count:22118277 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 108 [vrsave] 109 [vscr] 110 [sfp]
;; live  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp]

;; basic block 20, loop depth 1, count 5255967 (estimated locally), maybe hot
;;  prev block 14, next block 21, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       19 [always]  count:5255967 (estimated locally) (FALLTHRU)
;; bb 20 artificial_defs: { }
;; bb 20 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 123 124
;; lr  def 	 121 123 124 156 157 187
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	 121 123 124 156 157 187
;; live  kill	
(note 205 161 190 20 [bb 20] NOTE_INSN_BASIC_BLOCK)
(debug_insn 190 205 191 20 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 191 190 192 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
(insn 192 191 193 20 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (nil))
(insn 193 192 194 20 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg:DI 121 [ ivtmp.998 ])
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 69 {*adddi3}
     (nil))
(insn 194 193 195 20 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
(debug_insn 195 194 196 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
(insn 196 195 197 20 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (nil))
(insn 197 196 198 20 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg:DI 124 [ ivtmp.1000 ])
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 69 {*adddi3}
     (nil))
(insn 198 197 199 20 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
(debug_insn 199 198 200 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
(debug_insn 200 199 201 20 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 201 200 202 20 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
(insn 202 201 203 20 (set (reg:DI 123 [ doloop.995 ])
        (plus:DI (reg:DI 123 [ doloop.995 ])
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 69 {*adddi3}
     (nil))
(insn 203 202 204 20 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (nil))
(jump_insn 204 203 208 20 (set (pc)
        (if_then_else (ne (reg:CC 187)
                (const_int 0 [0]))
            (label_ref:DI 208)
            (pc))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 930 {*cbranch}
     (expr_list:REG_DEAD (reg:CC 187)
        (int_list:REG_BR_PROB 955630228 (nil)))
 -> 208)
;;  succ:       21 [89.0% (guessed)]  count:4677811 (estimated locally)
;;              17 [11.0% (guessed)]  count:578156 (estimated locally) (FALLTHRU,LOOP_EXIT)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 21, loop depth 1, count 4677811 (estimated locally), maybe hot
;;  prev block 20, next block 22, flags: (NEW, RTL, MODIFIED)
;;  pred:       20 [89.0% (guessed)]  count:4677811 (estimated locally)
;; bb 21 artificial_defs: { }
;; bb 21 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
(code_label 208 204 207 21 22 (nil) [1 uses])
(note 207 208 210 21 [bb 21] NOTE_INSN_BASIC_BLOCK)
;;  succ:       22 [always]  count:4677811 (estimated locally) (FALLTHRU)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 22, loop depth 1, count 9933778 (estimated locally), maybe hot
;;  prev block 21, next block 24, flags: (NEW, RTL, MODIFIED)
;;  pred:       21 [always]  count:4677811 (estimated locally) (FALLTHRU)
;;              23 [50.0% (adjusted)]  count:5255967 (estimated locally)
;; bb 22 artificial_defs: { }
;; bb 22 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 109 [vscr] 121 123 124 141 142 143
;; live  gen 	
;; live  kill	
(code_label 210 207 209 22 23 (nil) [1 uses])
(note 209 210 239 22 [bb 22] NOTE_INSN_BASIC_BLOCK)
(insn 239 209 230 22 (set (reg:DI 203)
        (lshiftrt:DI (reg:DI 197)
            (const_int 1 [0x1]))) -1
     (nil))
;;  succ:       11 [always]  count:9933778 (estimated locally) (FALLTHRU,DFS_BACK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 118 119 120 121 123 124 130 132 141 142 143 146 158 190 191 192 193 194 195
;; live  out 	 109 [vscr] 121 123 124 141 142 143

;; basic block 24, loop depth 2, count 42525545 (estimated locally), maybe hot
;;  prev block 22, next block 25, flags: (REACHABLE, RTL, MODIFIED)
;;  pred:       16 [always]  count:42525545 (estimated locally) (FALLTHRU,DFS_BACK)
;; bb 24 artificial_defs: { }
;; bb 24 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 124 200 201 202
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp] 121 124 200 201 202
;; lr  def 	 121 123 124 156 157 187
;; live  in  	 121 124 200 201 202
;; live  gen 	 121 123 124 156 157 187
;; live  kill	
(note 230 239 215 24 [bb 24] NOTE_INSN_BASIC_BLOCK)
(debug_insn 215 230 216 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 216 215 217 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:4 -1
     (nil))
(insn 217 216 218 24 (set (reg/f:DI 156 [ _72 ])
        (mem/f:DI (plus:DI (reg:DI 121 [ ivtmp.998 ])
                (const_int 16 [0x10])) [103 MEM[(struct ps_insn * *)_45 + 16B]+0 S8 A64])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:36 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg:DI 121 [ ivtmp.998 ])
        (nil)))
(insn 218 217 219 24 (set (reg:DI 121 [ ivtmp.998 ])
        (plus:DI (reg:DI 200)
            (const_int 8 [0x8]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 200)
        (nil)))
(insn 219 218 220 24 (set (mem/f:DI (reg:DI 121 [ ivtmp.998 ]) [103 MEM[(struct ps_insn * *)_15]+0 S8 A64])
        (reg/f:DI 156 [ _72 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3301:18 687 {*movdi_internal64}
     (expr_list:REG_DEAD (reg/f:DI 156 [ _72 ])
        (nil)))
(debug_insn 220 219 221 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:4 -1
     (nil))
(insn 221 220 222 24 (set (reg:SI 157 [ _78 ])
        (mem:SI (plus:DI (reg:DI 124 [ ivtmp.1000 ])
                (const_int 8 [0x8])) [6 MEM[(int *)_46 + 8B]+0 S4 A32])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:50 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:DI 124 [ ivtmp.1000 ])
        (nil)))
(insn 222 221 223 24 (set (reg:DI 124 [ ivtmp.1000 ])
        (plus:DI (reg:DI 201)
            (const_int 4 [0x4]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 201)
        (nil)))
(insn 223 222 224 24 (set (mem:SI (reg:DI 124 [ ivtmp.1000 ]) [6 MEM[(int *)_16]+0 S4 A32])
        (reg:SI 157 [ _78 ])) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3302:25 560 {*movsi_internal1}
     (expr_list:REG_DEAD (reg:SI 157 [ _78 ])
        (nil)))
(debug_insn 224 223 225 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:7 discrim 3 -1
     (nil))
(debug_insn 225 224 226 24 (var_location:SI row (clobber (const_int 0 [0]))) -1
     (nil))
(debug_insn 226 225 227 24 (debug_marker) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (nil))
(insn 227 226 228 24 (set (reg:DI 123 [ doloop.995 ])
        (plus:DI (reg:DI 202)
            (const_int -1 [0xffffffffffffffff]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 69 {*adddi3}
     (expr_list:REG_DEAD (reg:DI 202)
        (nil)))
(insn 228 227 238 24 (set (reg:CC 187)
        (compare:CC (reg:DI 123 [ doloop.995 ])
            (const_int 0 [0]))) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 845 {*cmpdi_signed}
     (nil))
(jump_insn 238 228 233 24 (parallel [
            (set (pc)
                (if_then_else (ne (reg:DI 203)
                        (const_int 1 [0x1]))
                    (label_ref 233)
                    (pc)))
            (set (reg:DI 203)
                (plus:DI (reg:DI 203)
                    (const_int -1 [0xffffffffffffffff])))
            (clobber (scratch:CC))
            (clobber (scratch:DI))
        ]) "/builddir/gcc-13.2.1_git20231014/gcc/modulo-sched.cc":3299:25 discrim 1 -1
     (int_list:REG_BR_PROB 955630228 (nil))
 -> 233)
;;  succ:       25 [89.0% (guessed)]  count:37847735 (estimated locally)
;;              17 [11.0% (guessed)]  count:4677810 (estimated locally) (FALLTHRU,LOOP_EXIT)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; live  out 	 121 123 124

;; basic block 25, loop depth 2, count 37847734 (estimated locally), maybe hot
;;  prev block 24, next block 1, flags: (NEW, RTL, MODIFIED)
;;  pred:       24 [89.0% (guessed)]  count:37847735 (estimated locally)
;; bb 25 artificial_defs: { }
;; bb 25 artificial_uses: { u-1(1){ }u-1(2){ }u-1(31){ }u-1(99){ }u-1(110){ }}
;; lr  in  	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; lr  use 	 1 [1] 2 [2] 31 [31] 99 [ap] 110 [sfp]
;; lr  def 	
;; live  in  	 121 123 124
;; live  gen 	
;; live  kill	
(code_label 233 238 232 25 24 (nil) [1 uses])
(note 232 233 0 25 [bb 25] NOTE_INSN_BASIC_BLOCK)
;;  succ:       11 [always]  count:37847734 (estimated locally) (FALLTHRU,DFS_BACK)
;; lr  out 	 1 [1] 2 [2] 31 [31] 99 [ap] 109 [vscr] 110 [sfp] 121 123 124
;; live  out 	 121 123 124

